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Resolve #3182 extend RMT memory #3264
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We'll need some way to prevent multiple channels accidentally using the same memory blocks. I didn't see anything related in this PR, did I miss something? |
I would think we would have to add a variable to maybe new_internal that has information if a block of memory is used or available. Does this sound like a good approach? Never mind I think I have an idea how to solve. |
I would like some feedback to the approach that I was thinking of using. The implementation would be the same in the configure_tx_channel. Not sure how to handle ESP32S3 for receive since it uses ch_index.
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* esp32s2: psram_cache_init typo fix broken esp32s2 psram since cb0016a * Add PSRAM test * Add changelog entry --------- Co-authored-by: Dániel Buga <[email protected]>
* feat: Update documentation links * feat: Add documentation field to Cargo.toml
* Add failing test case * Use pointer difference as the true FIFO count * Take FIFO pointers into account when calculating FIFO length * Fix grammar * Clear RX FIFO on overflow * Update esp-hal/src/uart.rs Co-authored-by: Dominic Fischer <[email protected]> * Handle overflow caught by RxFuture * Reset the fifo after clearing the interrupt --------- Co-authored-by: Dominic Fischer <[email protected]>
- Fixes a few links being broken after the rename in #3049
* Fix esp-lp-hal gpio read * Update esp-lp-hal changelog * Fix esp-lp-hal for esp32-s2 and esp32-c6 * Add PR number #3191 to the changelog
* Correctly clear fastrd_mode when data mode is Single * Print logs in QA test * Port SPI timing tuning from esp-idf * Fix ESP32 QSPI signals * Print the reason of an Unsupported error * Partial changelog
* Test flip-link * Add todo * Rebuild if linker files change * Let espsegs show .stack * Try to fix flip_link * Changelog * Make SSP configurable * Substitute config values
* WIP * Explain Async a bit better * Update esp-hal/src/lib.rs Co-authored-by: Scott Mabin <[email protected]> * Improve consistency * Disallow constructing driver modes --------- Co-authored-by: Scott Mabin <[email protected]>
* Mark unstable parts of config unstable * Unstable
* uart: docs improvement, re-shuffle and merge impl blocks * Add a note into developer-guidelines
* and again * examples * fix? * tz * after snippet * fmt * clippy * ugh * fix * ugh * remove examples * reset xtask * Update esp-hal/CHANGELOG.md Co-authored-by: Juraj Sadel <[email protected]> --------- Co-authored-by: Robert Bastian <[email protected]> Co-authored-by: Juraj Sadel <[email protected]>
* FIFO_SIZE vs CHUNK_SIZE * I2C: ESP32/S2 workarounds * Docs * Fix test * CHANGELOG.md * Test empty writes, again * Empty Write * Comments * Add TODO comment * Use real FIFO size * Docs * Chunks
* feat(esp-println): Add timestamp to logging - Introduce new `timestamp` feature to enable logging with a timestamp in millis, in the same format as the bootloader. * Add CHANGELOG.md entry
* Pass CI=1 to lint_packages * Move xtensa procmacros to repo root * Fix lint issues
* Prepare linker scripts for app-desc * Explain flash offset * Explain `rotext_dummy` * Test app-descriptor * fmt * embedded-storage
* esp32s2: psram_cache_init typo fix broken esp32s2 psram since cb0016a * Add PSRAM test * Add changelog entry --------- Co-authored-by: Dániel Buga <[email protected]>
* Add failing test case * Use pointer difference as the true FIFO count * Take FIFO pointers into account when calculating FIFO length * Fix grammar * Clear RX FIFO on overflow * Update esp-hal/src/uart.rs Co-authored-by: Dominic Fischer <[email protected]> * Handle overflow caught by RxFuture * Reset the fifo after clearing the interrupt --------- Co-authored-by: Dominic Fischer <[email protected]>
* Correctly clear fastrd_mode when data mode is Single * Print logs in QA test * Port SPI timing tuning from esp-idf * Fix ESP32 QSPI signals * Print the reason of an Unsupported error * Partial changelog
* Test flip-link * Add todo * Rebuild if linker files change * Let espsegs show .stack * Try to fix flip_link * Changelog * Make SSP configurable * Substitute config values
* uart: docs improvement, re-shuffle and merge impl blocks * Add a note into developer-guidelines
* and again * examples * fix? * tz * after snippet * fmt * clippy * ugh * fix * ugh * remove examples * reset xtask * Update esp-hal/CHANGELOG.md Co-authored-by: Juraj Sadel <[email protected]> --------- Co-authored-by: Robert Bastian <[email protected]> Co-authored-by: Juraj Sadel <[email protected]>
* FIFO_SIZE vs CHUNK_SIZE * I2C: ESP32/S2 workarounds * Docs * Fix test * CHANGELOG.md * Test empty writes, again * Empty Write * Comments * Add TODO comment * Use real FIFO size * Docs * Chunks
* feat(esp-println): Add timestamp to logging - Introduce new `timestamp` feature to enable logging with a timestamp in millis, in the same format as the bootloader. * Add CHANGELOG.md entry
* Pass CI=1 to lint_packages * Move xtensa procmacros to repo root * Fix lint issues
* Prepare linker scripts for app-desc * Explain flash offset * Explain `rotext_dummy` * Test app-descriptor * fmt * embedded-storage
This attempts to add a doctest showing how to plug a micro-second Unix timestamp into Jiff, and then get, e.g., the weekday in a particular locale. The example also makes use of Jiff's new `tz::get!` proc-macro for embedding time zones into the binary for use in core-only environments. Ref #3185, Ref #3200
* Add degrade fns, move anyi2s and anyi2c * Update esp-hal/CHANGELOG.md Co-authored-by: Dominic Fischer <[email protected]> --------- Co-authored-by: Dominic Fischer <[email protected]>
* Support "build-documentation-index --serve" * Support `/latest` in generated docs * `/latest` vs `/latest/` * Update documentation field
* Move OnDrop * Abort async transfer * Finish sentence
* i2c: make blocking impl first in docs * uart: group write and flush together * reviews && use address instead of addr in lp i2c in pub API
my fork is completely broken will start over with new fork. |
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Pull Request Details 📖
Add the ability to extend RMT memory on a RMT channel
Description
Added changes to rmt.rs to allow the user to use extended RMT memory on a channel. This allows a user to have more pulse codes than the default of 64, 48 pulse codes depending upon the device used.
My uses case was to receive pulse codes from a weather station sensor that exceeded one RMT memory block of 64 (for ESP32).
Testing
I tested on an ESP32 and a ESP32S3 using the examples/embassy_rmt_rx. I also wrote my own example that would transmit and receive a 207 pulsecodes on an ESP32. I sent 207 pulsecodes from the ESP32 to a ESP32S3. The 207 pulsecodes contained 3 duplicate messages and I was able to receive 2 of the 3 message on the ESP32S3 since the ESP32S# max receive memory is 192.