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build: add RISC-V native case #7859
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Add a case for RISC-V native builds. Future RISC-V JIT development will be utilize added this case.
CT Test Results 5 files 155 suites 49m 22s ⏱️ Results for commit 08bfc42. To speed up review, make sure that you have read Contributing to Erlang/OTP and that all checks pass. See the TESTING and DEVELOPMENT HowTo guides for details about how to run test locally. Artifacts// Erlang/OTP Github Action Bot |
@@ -3027,6 +3029,10 @@ AC_DEFUN([LM_HARDWARE_ARCH], [ | |||
AC_MSG_RESULT(yes: adjusting ARCH=arm to ARCH=arm64) | |||
ARCH=arm64 | |||
;; | |||
riscv64) |
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This will never match, since the case values are on the form "<arch>-<4-or-8>". Also it's not clear to me that RISC-V needs this kludge. Are there RISC-V systems that report themselves as riscv64 but generate 32-bit code by default, or report themselves as riscv32 but generate 64-bit code by default? If not, then you don't need to touch this bit.
The origin for was operating systems like Solaris that ran on 64-bit hardware but defaulted (at the time at least) to generating 32-bit code.
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Thanks for the code review @mikpe, I'll update the patch to follow your code review! :)
#7498 Add a case for RISC-V native builds.
Future RISC-V JIT development will be utilize added this case.