Pinned Loading
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fpga_rocket_launcher
fpga_rocket_launcher PublicModel rocket launch controller implemented in a FPGA chip
SystemVerilog
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launch_control_chip
launch_control_chip PublicA model rocket launch control chip in a 3mm x 3mm package. A better push button.
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sha256-fpga
sha256-fpga PublicSet of increasing speed SHA2 hash designs fitting in an Altera 10M25 fpga. Measured 8 Mhz SHA2 double hashes. I can see the steps to get to terra hash rate realm asics.
SystemVerilog
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vfd-mult
vfd-mult PublicLow latency 1024bit modulus squared FPGA design. 25.2ns measured latency in AWS F1 cloud FPGAs.
SystemVerilog
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croc
croc PublicForked from pulp-platform/croc
Tiny (cve2) RiscV system-on-a-chip simulating running C code bringing up new Verilog hardware components.
SystemVerilog
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