Use debug_printf() for debug output

Define DEBUGOUT to -1 for SWV or RTT output via debug interface.

Src/can.c

@@ -93,7 +93,7 @@ bool can_add_filter (uint32_t id, uint32_t mask, bool ext_id, can_rx_ptr callbac
 
     sFilterConfig.FilterIndex = index;
 
-    printf("can_add_filter(), adding new filter - id:%lu, idx:%u\n", id, index);
+    //debug_printf("can_add_filter(), adding new filter - id:%lu, idx:%u\n", id, index);
 
     rx_callbacks[index++] = callback;
 
@@ -132,7 +132,7 @@ bool can_start (uint32_t baud, can_rx_enqueue_fn callback)
     PLL1_ClocksTypeDef pll1_clocks;
     HAL_RCCEx_GetPLL1ClockFreq(&pll1_clocks);
     uint32_t pll1_q_freq = pll1_clocks.PLL1_Q_Frequency;
-    printf("can_start(), PLL1_Q frequency: %lu\n", pll1_q_freq);
+    debug_printf("can_start(), PLL1_Q frequency: %lu\n", pll1_q_freq);
 
     switch (pll1_q_freq) {
 
@@ -182,7 +182,7 @@ bool can_start (uint32_t baud, can_rx_enqueue_fn callback)
     }
 
     if (unknown_rate) {
-        printf("can_start(), error - unable to calculate bit timings\n");
+        debug_printf("can_start(), error - unable to calculate bit timings\n");
         return(0);
     }
 
@@ -295,7 +295,7 @@ void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs)
                  * point outside of the valid array..
                  */
                 if (RxHeader.FilterIndex > CAN_MAX_FILTERS) {
-                    printf("HAL_FDCAN_RxFifo0Callback(), unexpected message received - id:%lu, idx:%lu\n",
+                    debug_printf("HAL_FDCAN_RxFifo0Callback(), unexpected message received - id:%lu, idx:%lu\n",
                             RxHeader.Identifier, RxHeader.FilterIndex);
                     return;
                 }
@@ -306,8 +306,8 @@ void HAL_FDCAN_RxFifo0Callback(FDCAN_HandleTypeDef *hfdcan, uint32_t RxFifo0ITs)
                  * would just end up dropping messages somewhere else (i.e. in the CAN RX fifo)..
                  */
 
-                printf("HAL_FDCAN_RxFifo0Callback(), adding new msg to RX queue - id:%lu, idx:%lu\n",
-                        RxHeader.Identifier, RxHeader.FilterIndex);
+                //debug_printf("HAL_FDCAN_RxFifo0Callback(), adding new msg to RX queue - id:%lu, idx:%lu\n",
+                //        RxHeader.Identifier, RxHeader.FilterIndex);
 
                 message.id = RxHeader.Identifier;
                 // DLC has to be right shifted by 16bits for the FDCAN driver

Src/debug.c

@@ -0,0 +1,90 @@
+/*
+
+  debug.c - debug output for STM32H7xx ARM processors
+
+  Part of grblHAL
+
+  Copyright (c) 2024 Jon Escombe
+
+  grblHAL is free software: you can redistribute it and/or modify
+  it under the terms of the GNU General Public License as published by
+  the Free Software Foundation, either version 3 of the License, or
+  (at your option) any later version.
+
+  grblHAL is distributed in the hope that it will be useful,
+  but WITHOUT ANY WARRANTY; without even the implied warranty of
+  MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+  GNU General Public License for more details.
+
+  You should have received a copy of the GNU General Public License
+  along with grblHAL. If not, see <http://www.gnu.org/licenses/>.
+
+*/
+
+#if DEBUGOUT == -1
+
+// Default to Serial Wire Viewer (SWV)
+#ifndef DEBUGOUT_BACKEND
+#define DEBUGOUT_BACKEND 1
+#endif
+
+#if DEBUGOUT_BACKEND == 1 // SWV
+
+/*
+ * Using SWV on SWO/PB3 pin for debug output.
+ *
+ * Expects ITM trace to be enabled by the debugger.
+ *
+ */
+#include "stm32h7xx_hal.h"
+
+// Override default printf() output
+int _write(int file, char *ptr, int len)
+{
+    int i;
+
+    for (i = 0; i < len; i++)
+    {
+        ITM_SendChar(*ptr++);
+    }
+    return len;
+}
+
+// debug_write() is called with a null terminated string
+void debug_write (const char *s)
+{
+    char c;
+
+    while((c = *s++))
+        ITM_SendChar(c);
+}
+
+#elif DEBUGOUT_BACKEND == 2 // RTT
+
+/*
+ * Using Segger RTT for debug output.
+ *
+ * Expects the following Segger files to be added to the project sources;
+ * SEGGER_RTT.h
+ * SEGGER_RTT_Conf.h
+ * SEGGER_RTT.c
+ *
+ */
+#include "SEGGER_RTT.h"
+
+// Override default printf() output
+int _write(int file, char *ptr, int len)
+{
+      SEGGER_RTT_Write(0, ptr, len);
+      return len;
+}
+
+// debug_write() is called with a null terminated string
+void debug_write (const char *s)
+{
+    SEGGER_RTT_WriteString(0, s);
+}
+
+#endif // DEBUGOUT_BACKEND
+
+#endif // DEBUGOUT

Src/spiflash.c

@@ -115,7 +115,7 @@ static int xSPI_ReadBytes(const flash_cmd_t *cmd, uint32_t offset, uint8_t *data
 {
     xSPI_CmdTypeDef xspi_cmd;
 
-    //printf("RB %x 0x%08lx %p %d\n", cmd->cmd, offset, data, len);
+    //debug_printf("RB %x 0x%08lx %p %d\n", cmd->cmd, offset, data, len);
 
     xSPI_(SetCmd)(&xspi_cmd, cmd, offset, (uint8_t *) data, len);
 
@@ -185,7 +185,7 @@ static int xSPI_WriteBytes(const flash_cmd_t *cmd, uint32_t address, const uint8
 {
     xSPI_CmdTypeDef xspi_cmd;
 
-    //printf("WB %x 0x%08lx %p %d\n", cmd->cmd, address, data, len);
+    //debug_printf("WB %x 0x%08lx %p %d\n", cmd->cmd, address, data, len);
 
     xSPI_(SetCmd)(&xspi_cmd, cmd, address, (uint8_t *) data, len);
 
@@ -249,7 +249,7 @@ static int xSPI_PageProgram(uint32_t address, const uint8_t *buffer, size_t buff
 {
     assert(buffer_size <= 256);
 
-    //printf("PP cmd=%02X addr=0x%lx buf=%p len=%d\n", (*CMD(PP)).cmd, address, buffer, buffer_size);
+    //debug_printf("PP cmd=%02X addr=0x%lx buf=%p len=%d\n", (*CMD(PP)).cmd, address, buffer, buffer_size);
 
     if (xSPI_WriteBytes(CMD(PP), address, buffer, buffer_size) != SPIFLASH_OK) {
         return SPIFLASH_ERROR;
@@ -454,7 +454,7 @@ static int W25Qxx_Init()
     if (xSPI_ReadBytes(CMD(RDID), 0, &jedec_id.u8[0], 3) != SPIFLASH_OK) {
         return SPIFLASH_ERROR;
     }
-    printf("JEDEC_ID: %02X %02X %02X\n", jedec_id.u8[0], jedec_id.u8[1], jedec_id.u8[2]);
+    debug_printf("JEDEC_ID: %02X %02X %02X\n", jedec_id.u8[0], jedec_id.u8[1], jedec_id.u8[2]);
 
     if (xSPI_ReadBytes(CMD(RDSR1), 0, &sr1, 1) != SPIFLASH_OK) {
         return SPIFLASH_ERROR;
@@ -465,11 +465,11 @@ static int W25Qxx_Init()
     if (xSPI_ReadBytes(CMD(RDSR3), 0, &sr3, 1) != SPIFLASH_OK) {
         return SPIFLASH_ERROR;
     }
-    printf("Winbond SR1: %02X SR2: %02X SR3: %02X\n", sr1, sr2, sr3);
+    debug_printf("Winbond SR1: %02X SR2: %02X SR3: %02X\n", sr1, sr2, sr3);
 
     // Check/clear SR1 write protect bits
     if (sr1 & WB_SR1_PROTECT_MASK) {
-        printf("Clearing SR1 write protect bits\n");
+        //debug_printf("Clearing SR1 write protect bits\n");
 
         // Clear SR1 register, BUSY & WEL are status only bits (not changeable)
         sr1 = 0;
@@ -489,7 +489,7 @@ static int W25Qxx_Init()
             return SPIFLASH_ERROR;
         }
         if (sr1 & WB_SR1_PROTECT_MASK) {
-            printf("SR1: %02X, change failed\n", sr1);
+            //debug_printf("SR1: %02X, change failed\n", sr1);
             return SPIFLASH_ERROR;
         }
 
@@ -499,11 +499,11 @@ static int W25Qxx_Init()
     if ((sr2 & WB_SR2_PROTECT_MASK) || !(sr2 & WB_SR2_QE_MASK)) {
 
         if (sr2 & WB_SR2_PROTECT_MASK) {
-            printf("Clearing SR2 write protect bits\n");
+            //debug_printf("Clearing SR2 write protect bits\n");
         }
 
         if (!(sr2 & WB_SR2_QE_MASK)) {
-            printf("Setting SR2 Quad Enable bit\n");
+            //debug_printf("Setting SR2 Quad Enable bit\n");
         }
 
            // Clear SR2 register, set just Quad Enable bit
@@ -525,7 +525,7 @@ static int W25Qxx_Init()
             return SPIFLASH_ERROR;
         }
         if ((sr2 & WB_SR2_PROTECT_MASK) || !(sr2 & WB_SR2_QE_MASK)) {
-            printf("SR2: %02X, change failed\n", sr2);
+            //debug_printf("SR2: %02X, change failed\n", sr2);
             return SPIFLASH_ERROR;
         }
     }
@@ -534,11 +534,11 @@ static int W25Qxx_Init()
     if ((sr3 & WB_SR3_PROTECT_MASK) || ((sr3 & WB_SR3_DRV_MASK) != WB_SR3_DRV_MATCH)) {
 
         if (sr3 & WB_SR3_PROTECT_MASK) {
-            printf("Clearing SR3 write protect bits\n");
+            //debug_printf("Clearing SR3 write protect bits\n");
         }
 
         if ((sr3 & WB_SR3_DRV_MASK) != WB_SR3_DRV_MATCH) {
-            printf("Setting SR3 Drive Strength bits\n");
+            //debug_printf("Setting SR3 Drive Strength bits\n");
         }
 
            // Clear SR3 register, set just Drive Strength bits
@@ -560,7 +560,7 @@ static int W25Qxx_Init()
             return SPIFLASH_ERROR;
         }
         if ((sr3 & WB_SR3_PROTECT_MASK) || ((sr3 & WB_SR3_DRV_MASK) != WB_SR3_DRV_MATCH)) {
-            printf("SR3: %02X, change failed\n", sr3);
+            //debug_printf("SR3: %02X, change failed\n", sr3);
             return SPIFLASH_ERROR;
         }
     }