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Merge pull request eclipse-omr#7449 from knn-k/aarch64trn
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Add vector trn instructions
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0xdaryl authored Aug 27, 2024
2 parents dc1ec39 + 20448ec commit 35b34b4
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Showing 4 changed files with 42 additions and 0 deletions.
4 changes: 4 additions & 0 deletions compiler/aarch64/codegen/ARM64Debug.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -921,6 +921,10 @@ static const char *opCodeToNameMap[] =
"vuzp2_8h",
"vuzp2_4s",
"vuzp2_2d",
"vtrn1_8b",
"vtrn1_16b",
"vtrn2_8b",
"vtrn2_16b",
"vext16b",
"vneg16b",
"vneg8h",
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4 changes: 4 additions & 0 deletions compiler/aarch64/codegen/OMRInstOpCode.enum
Original file line number Diff line number Diff line change
Expand Up @@ -906,6 +906,10 @@
vuzp2_8h, /* 0x4E405800 UZP2 */
vuzp2_4s, /* 0x4E805800 UZP2 */
vuzp2_2d, /* 0x4EC05800 UZP2 */
vtrn1_8b, /* 0x0E002800 TRN1 */
vtrn1_16b, /* 0x4E002800 TRN1 */
vtrn2_8b, /* 0x0E006800 TRN2 */
vtrn2_16b, /* 0x4E006800 TRN2 */
/* Vector extract */
vext16b, /* 0x6E000000 EXT */
/* Vector Data-processing (1 source) */
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4 changes: 4 additions & 0 deletions compiler/aarch64/codegen/OpBinary.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -907,6 +907,10 @@ const OMR::ARM64::InstOpCode::OpCodeBinaryEntry OMR::ARM64::InstOpCode::binaryEn
0x4E405800, /* UZP2 vuzp2_8h */
0x4E805800, /* UZP2 vuzp2_4s */
0x4EC05800, /* UZP2 vuzp2_2d */
0x0E002800, /* TRN1 vtrn1_8b */
0x4E002800, /* TRN1 vtrn1_16b */
0x0E006800, /* TRN2 vtrn2_8b */
0x4E006800, /* TRN2 vtrn2_16b */
/* Vector extract */
0x6E000000, /* EXT vext16b */
/* Vector Data-processing (1 source) */
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30 changes: 30 additions & 0 deletions fvtest/compilerunittest/aarch64/BinaryEncoder.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -1636,6 +1636,36 @@ INSTANTIATE_TEST_CASE_P(VectorUnzip2, ARM64Trg1Src2EncodingTest, ::testing::Valu
std::make_tuple(TR::InstOpCode::vuzp2_2d, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v31, "4edf5800")
));

INSTANTIATE_TEST_CASE_P(VectorTrn1, ARM64Trg1Src2EncodingTest, ::testing::Values(
std::make_tuple(TR::InstOpCode::vtrn1_8b, TR::RealRegister::v15, TR::RealRegister::v0, TR::RealRegister::v0, "0e00280f"),
std::make_tuple(TR::InstOpCode::vtrn1_8b, TR::RealRegister::v31, TR::RealRegister::v0, TR::RealRegister::v0, "0e00281f"),
std::make_tuple(TR::InstOpCode::vtrn1_8b, TR::RealRegister::v0, TR::RealRegister::v15, TR::RealRegister::v0, "0e0029e0"),
std::make_tuple(TR::InstOpCode::vtrn1_8b, TR::RealRegister::v0, TR::RealRegister::v31, TR::RealRegister::v0, "0e002be0"),
std::make_tuple(TR::InstOpCode::vtrn1_8b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v15, "0e0f2800"),
std::make_tuple(TR::InstOpCode::vtrn1_8b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v31, "0e1f2800"),
std::make_tuple(TR::InstOpCode::vtrn1_16b, TR::RealRegister::v15, TR::RealRegister::v0, TR::RealRegister::v0, "4e00280f"),
std::make_tuple(TR::InstOpCode::vtrn1_16b, TR::RealRegister::v31, TR::RealRegister::v0, TR::RealRegister::v0, "4e00281f"),
std::make_tuple(TR::InstOpCode::vtrn1_16b, TR::RealRegister::v0, TR::RealRegister::v15, TR::RealRegister::v0, "4e0029e0"),
std::make_tuple(TR::InstOpCode::vtrn1_16b, TR::RealRegister::v0, TR::RealRegister::v31, TR::RealRegister::v0, "4e002be0"),
std::make_tuple(TR::InstOpCode::vtrn1_16b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v15, "4e0f2800"),
std::make_tuple(TR::InstOpCode::vtrn1_16b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v31, "4e1f2800")
));

INSTANTIATE_TEST_CASE_P(VectorTrn2, ARM64Trg1Src2EncodingTest, ::testing::Values(
std::make_tuple(TR::InstOpCode::vtrn2_8b, TR::RealRegister::v15, TR::RealRegister::v0, TR::RealRegister::v0, "0e00680f"),
std::make_tuple(TR::InstOpCode::vtrn2_8b, TR::RealRegister::v31, TR::RealRegister::v0, TR::RealRegister::v0, "0e00681f"),
std::make_tuple(TR::InstOpCode::vtrn2_8b, TR::RealRegister::v0, TR::RealRegister::v15, TR::RealRegister::v0, "0e0069e0"),
std::make_tuple(TR::InstOpCode::vtrn2_8b, TR::RealRegister::v0, TR::RealRegister::v31, TR::RealRegister::v0, "0e006be0"),
std::make_tuple(TR::InstOpCode::vtrn2_8b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v15, "0e0f6800"),
std::make_tuple(TR::InstOpCode::vtrn2_8b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v31, "0e1f6800"),
std::make_tuple(TR::InstOpCode::vtrn2_16b, TR::RealRegister::v15, TR::RealRegister::v0, TR::RealRegister::v0, "4e00680f"),
std::make_tuple(TR::InstOpCode::vtrn2_16b, TR::RealRegister::v31, TR::RealRegister::v0, TR::RealRegister::v0, "4e00681f"),
std::make_tuple(TR::InstOpCode::vtrn2_16b, TR::RealRegister::v0, TR::RealRegister::v15, TR::RealRegister::v0, "4e0069e0"),
std::make_tuple(TR::InstOpCode::vtrn2_16b, TR::RealRegister::v0, TR::RealRegister::v31, TR::RealRegister::v0, "4e006be0"),
std::make_tuple(TR::InstOpCode::vtrn2_16b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v15, "4e0f6800"),
std::make_tuple(TR::InstOpCode::vtrn2_16b, TR::RealRegister::v0, TR::RealRegister::v0, TR::RealRegister::v31, "4e1f6800")
));

INSTANTIATE_TEST_CASE_P(VectorUMLAL, ARM64Trg1Src2EncodingTest, ::testing::Values(
std::make_tuple(TR::InstOpCode::vumlal_8h, TR::RealRegister::v15, TR::RealRegister::v0, TR::RealRegister::v0, "2e20800f"),
std::make_tuple(TR::InstOpCode::vumlal_8h, TR::RealRegister::v31, TR::RealRegister::v0, TR::RealRegister::v0, "2e20801f"),
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