feat(devices): add remote platform erase support#846
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Codecov Report❌ Patch coverage is Additional details and impacted files@@ Coverage Diff @@
## main #846 +/- ##
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+ Coverage 43.44% 47.14% +3.70%
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Lines 13621 13811 +190
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rsdmike
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Thanks @nmgaston for doing this. @graikhel-intel and i have taken some time to think through and go through this. Here is our feedback:
- Simplify AMT features request/response to just include
rpeSupportedandrpe:
{
"redirection": true,
"KVM": true,
"SOL": true,
"IDER": true,
"optInState": 0,
"userConsent": "none",
"kvmAvailable": true,
"ocr": false,
"httpsBootSupported": true,
"winREBootSupported": true,
"localPBABootSupported": true,
"rpe": true,
"rpeSupported": true,
<remove>
"rpeCaps": 100728925,
"rpeSecureErase": true,
"rpeTPMClear": true,
"rpeClearBIOSNVM": true,
"rpeBIOSReload": true
</remove>
}Once this is done, can update the UI on the General AMT Info screen change RPE into a checkbox which will enable/disable rpe and grey it out/disable if rpe is not supported.
- Currently you have GET:
boot/capabilities/:guid(where is this used?) , POST:boot/rpe/:guid, and POST:remoteErase/:guidendpoints added. Consolidate this to GETboot/remoteErase/:guid-- which will fetch the supported capabilities
and POSTboot/remoteErase/:guidwhich will perform the desired action
{
"secureEraseAllSSDs": true,
"tpmClear": true,
"restoreBIOSToEOM": true,
"unconfigureCSME": true
}Note important removal of any mask representation of features. This will mean the UI needs to be updated with the new payload.
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…TART=5 should be used after RPE
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NOTE: Requires real AMT 16.0+ hardware with RPE BIOS support for end-to-end testing.
Related PRs
NewUint32Parameter)Description
Adds support for Intel Remote Platform Erase (RPE), a CSME 16.0+ feature that allows remote administrators to securely erase platform storage components (SSDs, TPM, BIOS NVM, etc.) on the next system boot.
What's New
API Endpoints
GET/api/v1/amt/boot/remoteErase/:guidBootCapabilitiesindicating which erase components the device BIOS supports (decoded fromAMT_BootCapabilities.PlatformErase)POST/api/v1/amt/boot/remoteErase/:guidRemoteEraseRequestbody specifying which components to eraseGETResponse —BootCapabilities{ "secureEraseAllSSDs": true, "tpmClear": true, "restoreBIOSToEOM": true, "unconfigureCSME": true }Each field is decoded from the
AMT_BootCapabilities.PlatformErasebitmask:secureEraseAllSSDs0x04tpmClear0x40restoreBIOSToEOM0x4000000— BIOS Reload of Golden ConfigurationunconfigureCSMEPlatformErase != 0POSTRequest —RemoteEraseRequest{ "secureEraseAllSSDs": false, "tpmClear": false, "restoreBIOSToEOM": false, "unconfigureCSME": false }RPE Trigger Flow (
SetRemoteEraseOptions)32768) —CIM_BootService.RequestStateChange(32768). Non-fatal; some firmware versions returnActionNotSupportedhere.PlatformErase=true— sparsePUT AMT_BootSettingData. Non-fatal; the full PUT in step 4 also sets this flag, so erase can still succeed if this fails.GET AMT_BootSettingData— read current state and verifyRPEEnabled=true. ReturnsNotSupportederror to the caller if the flag is absent.CIM_BootConfigSetting.ChangeBootOrder("")— clears any active boot source override before setting CSME reset flags (equivalent toClearBootOptionsin the Intel AMT C# SDK). Only called when no hardware TLV targets are present (tlvMask == 0); clearing the boot order when hardware targets are also present causes undefined BIOS behavior.CIM_BootService.RequestStateChange(32770)— switch firmware to RPE mode. Required when the boot service is in OCR mode (32769); omitting it causesActionNotSupported.PUT AMT_BootSettingDatawith:PlatformErase=true(when hardware TLV targets are present)ConfigurationDataReset=true(whenunconfigureCSMEwas requested)UefiBootParametersArray=<TLV>(when hardware TLV targets are present)PlatformEraselatched from the pre-latch step; aborts if it did not.CIM_BootService.SetBootConfigRole— activate the boot configuration.RequestPowerStateChange(PowerCycleOffHard)— full S5→S0 power cycle to execute erase on next boot.TLV Encoding (
UefiBootParametersArray)When hardware targets are present the
tlvMask(request bitmask withrpeCSMEBitstripped) is encoded as a single TLV entry and base64-encoded intoUefiBootParametersArray:CIM_BootService.EnabledStateConstantsSetFeaturescomputes the required state viaocrBootState(ocr, rpe), andsetRPEruns before the boot service state change to avoid the OCR state blocking the RPE PUT.DTO / Feature Surface
FeaturesandFeaturesRequestDTOs (v1 + v2) updated with:rpeFeatures(v1 + v2),FeaturesRequest(v1)EnabledStateis32770or32771)rpeSupportedFeatures(v1 + v2)PlatformErasecapabilities,0x01)Testing
GetRemoteEraseCapabilitiesandSetRemoteEraseOptionsuse-case functions and HTTP controller handlersSetFeaturestests extended to cover RPE + OCR state combinationsbuildRPETLVParamscovering individual hardware targets, combined masks, and CSME bit strippingNotes
0x10000(rpeCSMEBit) is a UI-level sentinel for "Unconfigure Intel CSME Firmware". It is not passed as a TLV device-bitmask bit. When set in the request it setsConfigurationDataReset=truein the PUT and is stripped fromtlvMask.PlatformEraseandConfigurationDataResetare independent flags and are never both set from the same bit.unconfigureCSME) must be requested alone — it cannot be combined with hardware TLV targets (TPM, SSD, BIOS Reload) in one call. The UI enforces this; the backend additionally guardsChangeBootOrderfrom firing whentlvMask != 0to prevent silently poisoning hardware targets if the API is called directly with a combined mask.UefiBootParametersArraymust be non-empty whenPlatformErase=true— the firmware returnsInvalidRepresentationif the element is absent or empty. The TLV device bitmask (ParameterTypeID=1) is mandatory per the Intel RPE spec.PowerCycleOffHard(S5→S0) is required for erase execution;MasterBusReset(warm reset) keeps ME power rails energised so the BIOS never executes the CSME/platform erase.RequestStateChange(32770)must be called before the PUT when the boot service is in OCR mode (32769); omitting it causesActionNotSupported.AMT_BootCapabilities.PlatformErase == 0return a validation error rather than attempting the operation.