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Apple2: implement sleep using MONWAIT
Also publish detect_iigs(), set_iigs_speed() and get_iigs_speed(). Refactor to only store one ostype variable.
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; | ||
; Colin Leroy-Mira <[email protected]>, 2024 | ||
; | ||
; void __fastcall__ detect_iigs(void) | ||
; | ||
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.export _detect_iigs | ||
.import ostype, return0, return1 | ||
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.include "apple2.inc" | ||
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; Returns 1 if running on IIgs, 0 otherwise | ||
_detect_iigs: | ||
lda ostype | ||
bpl :+ | ||
jmp return1 | ||
: jmp return0 |
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; | ||
; Colin Leroy-Mira <[email protected]>, 2024 | ||
; | ||
; unsigned char __fastcall__ get_iigs_speed(void) | ||
; | ||
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.export _get_iigs_speed | ||
.import ostype, return0 | ||
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.include "apple2.inc" | ||
.include "accelerator.inc" | ||
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_get_iigs_speed: | ||
lda ostype ; Return SLOW if not IIgs | ||
bpl :+ | ||
lda CYAREG ; Check current setting | ||
bpl :+ | ||
lda #SPEED_FAST | ||
ldx #$00 | ||
rts | ||
.assert SPEED_SLOW = 0, error | ||
: jmp return0 ; SPEED_SLOW |
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; | ||
; Colin Leroy-Mira <[email protected]>, 2024 | ||
; | ||
; unsigned char __fastcall__ detect_iigs(unsigned char speed) | ||
; | ||
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.export _set_iigs_speed | ||
.import ostype, return0 | ||
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.include "apple2.inc" | ||
.include "accelerator.inc" | ||
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_set_iigs_speed: | ||
tax ; Keep parameter | ||
lda ostype ; Return if not IIgs | ||
bmi :+ | ||
jmp return0 | ||
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: lda CYAREG | ||
cpx #SPEED_SLOW | ||
beq :+ | ||
ora #%10000000 | ||
bne set_speed | ||
: and #%01111111 | ||
set_speed: | ||
sta CYAREG | ||
txa | ||
ldx #$00 | ||
rts |
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; | ||
; Colin Leroy-Mira <[email protected]>, 2024 | ||
; | ||
; void __fastcall__ sleep(unsigned s) | ||
; | ||
; | ||
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.export _sleep | ||
.import _get_iigs_speed | ||
.import _set_iigs_speed | ||
.import WAIT | ||
.importzp tmp1 | ||
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.include "accelerator.inc" | ||
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; This functions uses the Apple2 WAIT ROM routine to waste a certain | ||
; amount of cycles and returns approximately after the numbers of | ||
; seconds passed in AX. | ||
; | ||
; It takes 1023730 cycles when called with AX=1 (1,0007s), | ||
; 10236364 cycles when called with AX=10 (10,006 seconds), | ||
; 306064298 cycles with AX=300 (299.2 seconds). | ||
; | ||
; Caveat: IRQs firing during calls to sleep will make the sleep longer | ||
; by the amount of cycles it takes to handle the IRQ. | ||
; | ||
_sleep: | ||
stx tmp1 ; High byte of s in X | ||
tay ; Low byte in A | ||
ora tmp1 | ||
bne :+ | ||
rts | ||
: jsr _get_iigs_speed ; Save current CPU speed | ||
pha | ||
lda #SPEED_SLOW ; Down to 1MHz for consistency around WAIT | ||
jsr _set_iigs_speed | ||
sleep_1s: | ||
ldx #$0A ; Loop 10 times | ||
sleep_100ms: | ||
lda #$C7 ; Sleep about 99ms | ||
jsr WAIT | ||
lda #$0D ; About 1ms | ||
jsr WAIT | ||
dex | ||
bne sleep_100ms | ||
dey | ||
bne sleep_1s | ||
dec tmp1 | ||
bmi done | ||
dey ; Down to #$FF | ||
bne sleep_1s | ||
done: | ||
pla ; Restore CPU speed | ||
jmp _set_iigs_speed |
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; | ||
; Colin Leroy-Mira, 2024 | ||
; | ||
; WAIT routine | ||
; | ||
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.export WAIT | ||
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.include "apple2.inc" | ||
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.segment "LOWCODE" | ||
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WAIT: | ||
; Switch in ROM and call WAIT | ||
bit $C082 | ||
jsr $FCA8 ; Vector to WAIT routine | ||
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; Switch in LC bank 2 for R/O and return | ||
bit $C080 | ||
rts |
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