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Releases: bsc-pm-ompss-at-fpga/ait

ompss-2-at-fpga-release/3.1.1

20 Aug 10:22

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Version 7.5.5

  • Fixed dangling instrumentation ports
  • Minor fixes on constraints files

ompss-2-at-fpga-release/3.1.0

20 Aug 10:21

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Version 7.5.1

  • Updated bitinfo to v12
  • Added --disable_creator_ports option to disable memory ports in task-creator accelerators
  • Added support for multi-slr crossing register slices
  • Added support for tuning register slices stages
  • Several bug fixes

ompss-2-at-fpga-release/3.0.0

12 Mar 09:41

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  • Version 7.3.1
  • Removed support for Vivado < 2021.1
  • Added support for kv260 board
  • Updated boot step for Petalinux 2021.1
  • Reduced number of default Vivado jobs to launch

ompss-2-at-fpga-release/2.0.1

21 Aug 14:14

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  • Version 6.8.2
  • Fixed ZynqMP address mapping
  • Fixed POM configuration setting

ompss-2-at-fpga-release/2.0.0

06 Jul 08:36

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  • Version 6.8.0
  • Added support for alveo_u55c board
  • Added support for HBM-based boards
  • Updated bitinfo to v10
  • Fixes for Vitis HLS and newer Vivado versions

ompss-at-fpga-release/4.0.1

06 Jul 08:35

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  • Bump version to 6.5.3
  • Version 6.5.3
  • Added support for alveo_u280 and alveo_u280_hbm boards
  • Fixed not being able to correctly run AIT from synthesis or implementation step
  • Fixed timing constraints
  • Changed default target language to verilog
  • Correctly check Vivado naming conventions

ompss-2-at-fpga-release/1.0.0

06 Jul 08:30

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  • Bump version to 6.4.1
    • Versioning now follows SemVer specification
  • Unified hardware runtimes into Picos OmpSs Manager (POM) v6.0
    • Supports all the features previously supported by Fast OmpSs Manager (FOM) and Smart OmpSs Manager (SOM)
    • Automatically detect required hwruntime features and enable them accordingly
    • Deprecated --hwruntime argument
  • Added --interconnect_priorities argument to enable priorities on memory interconnects
  • Added support for OmpSs@FPGA accelerator wrapper v13, which depends on the new_task_spawner IP
  • Added support for Vitis HLS
  • Internal refactor to follow Python packages structure in order to distribute AIT through PyPI
  • Several bug fixes and improvements

ompss-at-fpga-release/4.0.0

30 Jan 11:26

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  • Bump version to 6.4.1
    • Versioning now follows SemVer specification
  • Unified hardware runtimes into Picos OmpSs Manager (POM) v6.0
    • Supports all the features previously supported by Fast OmpSs Manager (FOM) and Smart OmpSs Manager (SOM)
    • Automatically detect required hwruntime features and enable them accordingly
    • Deprecated --hwruntime argument
  • Added --interconnect_priorities argument to enable priorities on memory interconnects
  • Added support for OmpSs@FPGA accelerator wrapper v13, which depends on the new_task_spawner IP
  • Added support for Vitis HLS
  • Internal refactor to follow Python packages structure in order to distribute AIT through PyPI
  • Several bug fixes and improvements

ompss-at-fpga-release/3.3.1

30 May 12:54

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  • Bump version to 5.20
  • Check for invalid stride values when using memory interleaving feature
  • Compress IPs
  • Fix euroexa_maxilink and euroexa_maxilink_quad DDR part number

ompss-at-fpga-release/3.3.0

10 May 08:54

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  • Bump version to 5.19
  • Updated bitInfo to v9
  • Added --disable_spawn_queues argument to disable the instantiation of HWR spawn queues
  • Added --bitinfo_note argument to add a user-defined note to the bitInfo
  • Added euroexa_maxilink and euroexa_maxilink_quad boards
  • Enabled over temperature automatic shutdown on all boards
  • Enabled bitstream compression
  • Set randomly generated BITSTREAM_USERID on compilation time to identify bitstream files
  • Generate .bit.bin file for Zynq7000 boards when possible
  • Fixed zcu102 DDR DIMM configuration problem
  • Default number of Vivado jobs now depends on node's current available memory
  • Time is now formatted as human-readable
  • Improved error and information messages
  • Several bug fixes