spi-

Serial peripheral interface protocol using system verilog and testbench consists of 4 pin namely :
1.MOSI
2.MISO
3.SCLK
4.CS

Name	Name	Last commit message	Last commit date
Latest commit ayusdixit Update README.md Aug 30, 2022 0219a27 · Aug 30, 2022 History 8 Commits
README.md	README.md	Update README.md	Aug 30, 2022
spi.sv	spi.sv	Create spi.sv	Aug 29, 2022
tb.sv	tb.sv	Create tb.sv	Aug 30, 2022

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