Fix System Pin Feature Gate

.github/workflows/build.yml

@@ -11,9 +11,12 @@ jobs:
         run: echo "::set-output name=pac_matrix::$(ls ./pac --indicator-style=none | grep atsam | cut -c 3- | jq -ncR '[inputs]')"
       - id: boards
         run: echo "::set-output name=board_matrix::$(ls ./boards --indicator-style=none | jq -ncR '[inputs]')"
+      - id: features
+        run: echo "::set-output name=feature_matrix::[\"reconfigurable-system-pins\",\"usart-spi-host-without-select\"]"
     outputs:
       pac_matrix: ${{ steps.pacs.outputs.pac_matrix }}
       board_matrix: ${{ steps.boards.outputs.board_matrix }}
+      feature_matrix: ${{ steps.features.outputs.feature_matrix }}
 
   build:
     needs: setup
@@ -27,8 +30,21 @@ jobs:
       - name: Install Rust (thumbv7em)
         run: rustup show
       - name: Build HAL for ${{ matrix.pac }}
-        run: |
-          cargo check --package atsamx7x-hal --features ${{ matrix.pac }},unproven
+        run: cargo check --package atsamx7x-hal --features ${{ matrix.pac }},unproven
+
+  build-features:
+    needs: setup
+    runs-on: ubuntu-latest
+    strategy:
+      matrix:
+        features: ${{ fromJson(needs.setup.outputs.feature_matrix) }}
+    steps:
+      - name: Checkout sources
+        uses: actions/checkout@v2
+      - name: Install Rust (thumbv7em)
+        run: rustup show
+      - name: Build HAL for ${{ matrix.features }}
+        run: cargo check --package atsamx7x-hal --features ${{ matrix.features }},samv71q21b,unproven
 
   board-examples:
     needs: setup
@@ -55,7 +71,7 @@ jobs:
       - name: Install Rust (thumbv7em)
         run: rustup show
       - name: Lint HAL
-        run: cargo clippy --package atsamx7x-hal --no-deps --features samv71q21b,unproven -- --deny warnings
+        run: cargo clippy --package atsamx7x-hal --no-deps --features samv71q21b,unproven,reconfigurable-system-pins -- --deny warnings
 
   clippy-examples:
     needs: [setup, build, board-examples]
@@ -82,7 +98,7 @@ jobs:
       - name: Install Rust (thumbv7em)
         run: rustup show
       - name: Build HAL documentation
-        run: cargo doc --package atsamx7x-hal --no-deps --features samv71q21b,unproven
+        run: cargo doc --package atsamx7x-hal --no-deps --features samv71q21b,unproven,reconfigurable-system-pins
       - name: Build HAL doc tests
         run: cargo test --package atsamx7x-hal --doc --features samv71q21b,unproven --target x86_64-unknown-linux-gnu
 

CHANGELOG.md

@@ -24,6 +24,8 @@
 ### Fixed
 
 - HAL build when targeting `sams70n19b`.
+- The special-on-reset pins `PB4/5/6/7/12` are now completely unavailable, if the `reconfigurable-system-pins` feature is not enabled.
+- `Usart<Usart1>` and `Twi<TwiHS1>` are now only available if the `reconfigurable-system-pins` feature is enabled, as they cannot obtain a valid pin configuration without it.
 
 ## [v0.3.0] 2022-08-26
 

hal/src/pio/bank.rs

@@ -371,12 +371,17 @@ banks!(
         (PB1, 1),
         (PB2, 2),
         (PB3, 3),
+        #[cfg(feature = "reconfigurable-system-pins")]
         (PB4, 4),
+        #[cfg(feature = "reconfigurable-system-pins")]
         (PB5, 5),
+        #[cfg(feature = "reconfigurable-system-pins")]
         (PB6, 6),
+        #[cfg(feature = "reconfigurable-system-pins")]
         (PB7, 7),
         (PB8, 8),
         (PB9, 9),
+        #[cfg(feature = "reconfigurable-system-pins")]
         (PB12, 12),
         #[cfg(not(feature = "pins-64"))]
         (PB13, 13),

hal/src/pio/mod.rs

@@ -116,7 +116,7 @@ On reset the following [`Pin`]s:
 - [`Pin<PB12, _>`]
 
 are in "system I/O mode" where they provide debug, trace, and flash-erase functionality.
-By default, trying to configure these pins yield no effect, but can  be enabled via the `reconfigurable-system-pins` feature.
+By default, trying to configure these pins will cause a compile error, but can they be enabled via the `reconfigurable-system-pins` feature.
 */
 
 use crate::generics;

hal/src/pwm.rs

@@ -459,6 +459,7 @@ impl_pwm!(
                 Pin<PA1, PeripheralA>,
                 #[cfg(not(feature = "pins-64"))]
                 Pin<PA19, PeripheralB>,
+                #[cfg(feature = "reconfigurable-system-pins")]
                 Pin<PB5, PeripheralB>,
                 Pin<PD10, PeripheralB>,
                 Pin<PD24, PeripheralB>,
@@ -488,6 +489,7 @@ impl_pwm!(
                 Pin<PA20, PeripheralB>,
                 #[cfg(not(feature = "pins-64"))]
                 Pin<PA30, PeripheralA>,
+                #[cfg(feature = "reconfigurable-system-pins")]
                 Pin<PB12, PeripheralA>,
                 #[cfg(feature = "pins-144")]
                 Pin<PC1, PeripheralB>,
@@ -510,6 +512,7 @@ impl_pwm!(
                 Pin<PA13, PeripheralB>,
                 #[cfg(not(feature = "pins-64"))]
                 Pin<PA25, PeripheralB>,
+                #[cfg(feature = "reconfigurable-system-pins")]
                 Pin<PB4, PeripheralB>,
                 #[cfg(feature = "pins-144")]
                 Pin<PC19, PeripheralB>,

hal/src/serial/twi.rs

@@ -7,6 +7,10 @@ feripheral, by use of the [`Twi`] abstraction. The peripheral
 supports I²C, which is also the only protocol currently
 implemented.
 
+# System [`Pin`]s
+
+[`Twi<TwiHS1>`] can only obtain a legal pin configuration with the `reconfigurable-system-pins` feature and is therefore also hidden behind said feature gate.
+
 # Example usage
 
 ```no_run
@@ -41,11 +45,13 @@ twi.write_read(0x0, &[0b1000_0000], &mut buffer).unwrap();
 use crate::clocks::{Clock, Hertz, HostClock, PeripheralIdentifier};
 use crate::ehal::blocking;
 use crate::generics;
+#[cfg(feature = "reconfigurable-system-pins")]
+use crate::pac::TWIHS1;
 #[cfg(not(feature = "pins-64"))]
 use crate::pac::TWIHS2;
 use crate::pac::{
     twihs0::{sr::R as StatusRegister, RegisterBlock},
-    TWIHS0, TWIHS1,
+    TWIHS0,
 };
 use crate::pio::*;
 
@@ -286,6 +292,8 @@ impl_twi!(
         DATA: Pin<PA3, PeripheralA>,
         CLOCK: Pin<PA4, PeripheralA>,
     },
+
+    #[cfg(feature = "reconfigurable-system-pins")]
     TwiHS1: {
         DATA: Pin<PB4, PeripheralA>,
         CLOCK: Pin<PB5, PeripheralA>,

hal/src/serial/usart/mod.rs

@@ -17,6 +17,10 @@ these have yet to be implemented.
 Mode support depends on what [`Pin`]s that are available for the
 [`Usart`]; refer to [`UsartPins`].
 
+# System [`Pin`]s
+
+[`Usart<Usart1>`] can only obtain a legal pin configuration with the `reconfigurable-system-pins` feature and is therefore also hidden behind said feature gate.
+
 # Example usage
 
 ```no_run
@@ -83,15 +87,17 @@ let _ = spi.read().unwrap();
 pub use super::uart::{ChannelMode, ParityMode, UartConfiguration};
 use crate::clocks::{Clock, Hertz, HostClock, Pck, Pck4, PeripheralIdentifier};
 use crate::generics::{self, Token};
+#[cfg(feature = "reconfigurable-system-pins")]
+use crate::pac::USART1;
 #[cfg(not(feature = "pins-64"))]
 use crate::pac::USART2;
 use crate::pac::{
     usart0::us_mr_usart_mode::CHMODESELECT_A as HwChannelMode,
     usart0::us_mr_usart_mode::PARSELECT_A as HwParityMode,
     usart0::us_mr_usart_mode::USART_MODESELECT_A as HwUsartMode,
     usart0::us_mr_usart_mode::USCLKSSELECT_A as UsartClockSource, usart0::RegisterBlock, USART0,
-    USART1,
 };
+
 use crate::pio::*;
 use crate::serial::Bps;
 
@@ -630,6 +636,7 @@ impl_usart!(
         CTS: [ Pin<PB2,PeripheralC> ],
         RTS: [ Pin<PB3,PeripheralC> ],
     },
+    #[cfg(feature = "reconfigurable-system-pins")]
     Usart1: {
         SCK: [
             #[cfg(not(feature = "pins-64"))]
@@ -676,6 +683,7 @@ cfg_if::cfg_if! {
                 }
             }
         );
+        #[cfg(feature = "reconfigurable-system-pins")]
         impl_pins!(
             Usart1: {
                 (/* TX */ Pin<PB4, PeripheralD>, /* RX */ Pin<PA21, PeripheralA>, /* SCK */ Pin<PA23, PeripheralA>): {