Fix typo in SPI interrupt register field #472
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Awesome! Looks like CI is failing because the BSP examples haven't been updated to the new RTIC alpha. |
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@ianrrees, could you fix thumbv7em as well? And could you hardcode the RTIC version to alpha4? That should fix the tests. We can upgrade them later. |
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@jacobrosenthal, this is probably the problem with #455 |
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I've updated this PR for v7, but per matrix chat will make a new PR once we've figured out a fix for the RTIC example failures. |
ianrrees
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Had been hunting for an SPI bug that turned out to be atsamd-rs/atsamd#472
ianrrees
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Had been hunting for an SPI bug that turned out to be atsamd-rs/atsamd#472
kaizensparc
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Should be fairly self-explanatory ;)