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arm64/SMP: Fix FPU and exception handling for ARM64 #13695
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@GUIDINGLI the adaptation with #13520 is almost done. Flat mode nsh and nsh_smp both work, knsh doesn't work yet due to how SP_EL0 handling was changed. Can you please take a look that the SMP issue you mentioned is OK with these changes? I'll fix the kernel mode issue on Monday. |
Signed-off-by: ligd <[email protected]>
Signed-off-by: ligd <[email protected]>
Signed-off-by: lipengfei28 <[email protected]>
As the handling of sp_el0 was moved from the context switch routine to exception entry/exit, we must set sp_el0 explicitly when the user process is first started.
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SP_EL0 handling is now also fixed. Tested with: |
sizeof(struct arm64_cpu_fpu_context)); | ||
g_cpu_fpu_ctx[cpu].idle_thread = tcb; | ||
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tcb->xcp.fpu_regs = (uint64_t *)&g_idle_thread_fpu[cpu]; |
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What about:
- tcb->xcp.fpu_regs
- tcb->xcp.fpu_saved_regs
what should we do with those ?
Summary
Fix FPU and exception handling for ARM64 by:
This is a continuation of: #13520
@GUIDINGLI and @lipengfei28 Did the initial patches, which are adapted for CONFIG_BUILD_KERNEL / CONFIG_LIB_SYSCALL, which were implemented by me. The goal is to merge this work without breaking either one.
Impact
Impact is on ARM64 platform only. The impacted parts are the exception and ISR handling.
Testing
qemu-armv8a:nsh
qemu-armv8a:nsh_smp
qemu-armv8a:knsh