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Improve lint
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twizmwazin committed Oct 6, 2023
1 parent 8709979 commit 52447f9
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Showing 17 changed files with 73 additions and 58 deletions.
69 changes: 34 additions & 35 deletions archinfo/__init__.py
Original file line number Diff line number Diff line change
Expand Up @@ -7,63 +7,62 @@
__version__ = "9.2.72.dev0"


from .types import RegisterOffset, TmpVar, RegisterName, Endness
from .arch import (
Register,
Arch,
register_arch,
ArchNotFound,
Register,
all_arches,
arch_from_id,
reverse_ends,
get_host_arch,
all_arches,
register_arch,
reverse_ends,
)
from .defines import defines
from .arch_amd64 import ArchAMD64
from .arch_x86 import ArchX86
from .arch_arm import ArchARM, ArchARMEL, ArchARMHF, ArchARMCortexM
from .arch_aarch64 import ArchAArch64
from .arch_amd64 import ArchAMD64
from .arch_arm import ArchARM, ArchARMCortexM, ArchARMEL, ArchARMHF
from .arch_avr import ArchAVR8
from .arch_ppc32 import ArchPPC32
from .arch_ppc64 import ArchPPC64
from .arch_mips32 import ArchMIPS32
from .arch_mips64 import ArchMIPS64
from .arch_soot import ArchSoot
from .archerror import ArchError
from .arch_s390x import ArchS390X
from .arch_pcode import ArchPcode
from .arch_ppc32 import ArchPPC32
from .arch_ppc64 import ArchPPC64
from .arch_riscv64 import ArchRISCV64

from .arch_s390x import ArchS390X
from .arch_soot import ArchSoot
from .arch_x86 import ArchX86
from .archerror import ArchError
from .defines import defines
from .types import Endness, RegisterName, RegisterOffset, TmpVar

__all__ = [
"RegisterOffset",
"TmpVar",
"RegisterName",
"Endness",
"Register",
"Arch",
"register_arch",
"ArchNotFound",
"arch_from_id",
"reverse_ends",
"get_host_arch",
"all_arches",
"defines",
"ArchAArch64",
"ArchAMD64",
"ArchX86",
"ArchARM",
"ArchARMCortexM",
"ArchARMEL",
"ArchARMHF",
"ArchARMCortexM",
"ArchAArch64",
"ArchAVR8",
"ArchPPC32",
"ArchPPC64",
"ArchError",
"ArchMIPS32",
"ArchMIPS64",
"ArchSoot",
"ArchError",
"ArchS390X",
"ArchNotFound",
"ArchPPC32",
"ArchPPC64",
"ArchPcode",
"ArchRISCV64",
"ArchS390X",
"ArchSoot",
"ArchX86",
"Endness",
"Register",
"RegisterName",
"RegisterOffset",
"TmpVar",
"all_arches",
"arch_from_id",
"defines",
"get_host_arch",
"register_arch",
"reverse_ends",
]
10 changes: 5 additions & 5 deletions archinfo/arch.py
Original file line number Diff line number Diff line change
@@ -1,16 +1,16 @@
import copy
import logging
from typing import Dict, List, Tuple, Optional, Type, Any, Set, Union
import struct as _struct
import platform as _platform
import re
import struct as _struct
from typing import Any, Dict, List, Optional, Set, Tuple, Type, Union

from archinfo.types import RegisterName, RegisterOffset

from archinfo.types import RegisterOffset, RegisterName
from .archerror import ArchError
from .tls import TLSArchInfo
from .types import Endness

import copy

log = logging.getLogger("archinfo.arch")
log.addHandler(logging.NullHandler())

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3 changes: 2 additions & 1 deletion archinfo/arch_aarch64.py
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
from archinfo.types import RegisterOffset
from .arch import Arch, register_arch, Endness, Register

from .arch import Arch, Endness, Register, register_arch
from .tls import TLSArchInfo

try:
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5 changes: 3 additions & 2 deletions archinfo/arch_amd64.py
Original file line number Diff line number Diff line change
@@ -1,7 +1,8 @@
from archinfo.types import RegisterOffset
from .arch import Arch, register_arch, Endness, Register
from .tls import TLSArchInfo

from .arch import Arch, Endness, Register, register_arch
from .archerror import ArchError
from .tls import TLSArchInfo

try:
import capstone as _capstone
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2 changes: 1 addition & 1 deletion archinfo/arch_arm.py
Original file line number Diff line number Diff line change
Expand Up @@ -2,7 +2,7 @@

from archinfo.types import RegisterOffset

from .arch import Arch, register_arch, Endness, Register
from .arch import Arch, Endness, Register, register_arch
from .tls import TLSArchInfo

log = logging.getLogger("archinfo.arch_arm")
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2 changes: 1 addition & 1 deletion archinfo/arch_avr.py
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
from .arch import Arch, register_arch, Endness
from .arch import Arch, Endness, register_arch
from .archerror import ArchError
from .tls import TLSArchInfo

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2 changes: 1 addition & 1 deletion archinfo/arch_mips32.py
Original file line number Diff line number Diff line change
@@ -1,4 +1,4 @@
from .arch import Arch, register_arch, Endness, Register
from .arch import Arch, Endness, Register, register_arch
from .tls import TLSArchInfo

try:
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3 changes: 2 additions & 1 deletion archinfo/arch_mips64.py
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
from archinfo.types import RegisterOffset
from .arch import Arch, register_arch, Endness, Register

from .arch import Arch, Endness, Register, register_arch
from .tls import TLSArchInfo

try:
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3 changes: 2 additions & 1 deletion archinfo/arch_ppc32.py
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
from archinfo.types import RegisterOffset
from .arch import Arch, register_arch, Endness, Register

from .arch import Arch, Endness, Register, register_arch
from .tls import TLSArchInfo

try:
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3 changes: 2 additions & 1 deletion archinfo/arch_ppc64.py
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
from archinfo.types import RegisterOffset
from .arch import Arch, register_arch, Endness, Register

from .arch import Arch, Endness, Register, register_arch
from .tls import TLSArchInfo

try:
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3 changes: 2 additions & 1 deletion archinfo/arch_riscv64.py
Original file line number Diff line number Diff line change
@@ -1,5 +1,6 @@
from archinfo.types import RegisterOffset
from .arch import Arch, register_arch, Endness, Register

from .arch import Arch, Endness, Register, register_arch
from .tls import TLSArchInfo

try:
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3 changes: 2 additions & 1 deletion archinfo/arch_s390x.py
Original file line number Diff line number Diff line change
Expand Up @@ -14,7 +14,8 @@
_pyvex = None

from archinfo.types import RegisterOffset
from .arch import Arch, register_arch, Endness, Register

from .arch import Arch, Endness, Register, register_arch
from .archerror import ArchError
from .tls import TLSArchInfo

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8 changes: 4 additions & 4 deletions archinfo/arch_x86.py
Original file line number Diff line number Diff line change
@@ -1,9 +1,9 @@
from .arch import Arch, register_arch, Endness, Register
from .tls import TLSArchInfo
from .archerror import ArchError

from archinfo.types import RegisterOffset

from .arch import Arch, Endness, Register, register_arch
from .archerror import ArchError
from .tls import TLSArchInfo

try:
import capstone as _capstone
except ImportError:
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4 changes: 4 additions & 0 deletions archinfo/types.py
Original file line number Diff line number Diff line change
Expand Up @@ -8,6 +8,10 @@


class RegisterOffset(int):
"""A register offset is an integer that represents the offset of a register
in VEX's register memory space.
"""

def __add__(self, other):
if isinstance(other, int):
return RegisterOffset(int(self) + other)
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5 changes: 5 additions & 0 deletions pyproject.toml
Original file line number Diff line number Diff line change
Expand Up @@ -8,3 +8,8 @@ target-version = ['py38']

[tool.ruff]
line-length = 120
select = [
"E",
"F",
"I",
]
2 changes: 1 addition & 1 deletion tests/test_amd64.py
Original file line number Diff line number Diff line change
@@ -1,7 +1,7 @@
import unittest

from archinfo.arch import Endness
from archinfo import ArchAMD64, ArchError
from archinfo.arch import Endness


class TestAmd64(unittest.TestCase):
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4 changes: 2 additions & 2 deletions tests/test_pcode.py
Original file line number Diff line number Diff line change
@@ -1,14 +1,14 @@
# pylint:disable=missing-class-docstring,no-self-use
import unittest
import pickle
import unittest

try:
import pypcode
except ImportError:
pypcode = None

from archinfo import ArchError, ArchPcode
from archinfo.arch import Endness
from archinfo import ArchPcode, ArchError


@unittest.skipUnless(pypcode is not None, "pypcode not installed")
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