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boards: riscv: add nrf54h20pdk_nrf54h20_cpuppr
Add a board that allows to build for the nRF54H20 PPR RISC-V core. Signed-off-by: Gerard Marull-Paretas <[email protected]>
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# Copyright (c) 2024 Nordic Semiconductor ASA | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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config BOARD_NRF54H20PDK_NRF54H20_CPUPPR | ||
bool "nRF54H20 PDK nRF54H20 PPR MCU" | ||
depends on SOC_NRF54H20_ENGA_CPUPPR |
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# Copyright (c) 2024 Nordic Semiconductor ASA | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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config BOARD | ||
default "nrf54h20pdk_nrf54h20_cpuapp" | ||
depends on BOARD_NRF54H20PDK_NRF54H20_CPUPPR |
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# SPDX-License-Identifier: Apache-2.0 | ||
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include(${ZEPHYR_BASE}/boards/common/nrfjprog.board.cmake) |
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boards/riscv/nrf54h20pdk_nrf54h20/nrf54h20pdk_nrf54h20-pinctrl.dtsi
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/* | ||
* Copyright (c) 2024 Nordic Semiconductor ASA | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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&pinctrl { | ||
uart135_default: uart135_default { | ||
group1 { | ||
psels = <NRF_PSEL(UART_TX, 1, 4)>, | ||
<NRF_PSEL(UART_RTS, 1, 0)>; | ||
}; | ||
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group2 { | ||
bias-pull-up; | ||
psels = <NRF_PSEL(UART_RX, 1, 5)>, | ||
<NRF_PSEL(UART_CTS, 1, 6)>; | ||
}; | ||
}; | ||
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uart135_sleep: uart135_sleep { | ||
group1 { | ||
low-power-enable; | ||
psels = <NRF_PSEL(UART_TX, 1, 4)>, | ||
<NRF_PSEL(UART_RX, 1, 5)>, | ||
<NRF_PSEL(UART_RTS, 1, 0)>, | ||
<NRF_PSEL(UART_CTS, 1, 6)>; | ||
}; | ||
}; | ||
}; |
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boards/riscv/nrf54h20pdk_nrf54h20/nrf54h20pdk_nrf54h20_cpuppr.dts
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/* | ||
* Copyright (c) 2024 Nordic Semiconductor ASA | ||
* | ||
* SPDX-License-Identifier: Apache-2.0 | ||
*/ | ||
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/dts-v1/; | ||
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#include <nordic/nrf54h20_enga_cpuppr.dtsi> | ||
#include "nrf54h20pdk_nrf54h20-pinctrl.dtsi" | ||
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/ { | ||
compatible = "nordic,nrf54h20pdk_nrf54h20-cpuppr"; | ||
model = "Nordic nRF54H20 PDK nRF54H20 PPR MCU"; | ||
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chosen { | ||
zephyr,console = &uart135; | ||
zephyr,code-partition = &cpuppr_slot0_partition; | ||
zephyr,flash = &mram1x; | ||
zephyr,sram = &cpuppr_sram; | ||
}; | ||
}; | ||
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&grtc { | ||
status = "okay"; | ||
owned-channels = <5>; | ||
}; | ||
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&uart135 { | ||
status = "okay"; | ||
pinctrl-0 = <&uart135_default>; | ||
pinctrl-1 = <&uart135_sleep>; | ||
pinctrl-names = "default", "sleep"; | ||
}; | ||
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&ram3x { | ||
cpuppr_sram: memory@0 { | ||
reg = <0x0 DT_SIZE_K(28)>; | ||
}; | ||
}; | ||
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&mram1x { | ||
cpuppr_partitions: cpuppr-partitions { | ||
compatible = "fixed-partitions"; | ||
#address-cells = <1>; | ||
#size-cells = <1>; | ||
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cpuppr_slot0_partition: partition@126000 { | ||
reg = <0x126000 DT_SIZE_K(28)>; | ||
}; | ||
}; | ||
}; |
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boards/riscv/nrf54h20pdk_nrf54h20/nrf54h20pdk_nrf54h20_cpuppr.yaml
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# Copyright (c) 2024 Nordic Semiconductor ASA | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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identifier: nrf54h20pdk_nrf54h20_cpuppr | ||
name: nRF54H20-PDK-nRF54H20-PPR | ||
type: mcu | ||
arch: riscv | ||
toolchain: | ||
- zephyr | ||
ram: 28 | ||
flash: 368 | ||
supported: | ||
- gpio |
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boards/riscv/nrf54h20pdk_nrf54h20/nrf54h20pdk_nrf54h20_cpuppr_defconfig
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# Copyright (c) 2024 Nordic Semiconductor ASA | ||
# SPDX-License-Identifier: Apache-2.0 | ||
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CONFIG_SOC_SERIES_NRF54HX=y | ||
CONFIG_SOC_NRF54H20=y | ||
CONFIG_SOC_NRF54H20_ENGA_CPUPPR=y | ||
CONFIG_BOARD_NRF54H20PDK_NRF54H20_CPUPPR=y | ||
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CONFIG_SERIAL=y | ||
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CONFIG_CONSOLE=y | ||
CONFIG_UART_CONSOLE=y |