feat(PeriphDrivers): I3C target support

Add I3C target support for ME30.

Libraries/CMSIS/Device/Maxim/MAX32657/Include/i3c_regs.h

@@ -1042,9 +1042,27 @@ typedef struct {
 
 #define MXC_F_I3C_CAPABILITIES_CCCHANDLE_POS           12 /**< CAPABILITIES_CCCHANDLE Position */
 #define MXC_F_I3C_CAPABILITIES_CCCHANDLE               ((uint32_t)(0xFUL << MXC_F_I3C_CAPABILITIES_CCCHANDLE_POS)) /**< CAPABILITIES_CCCHANDLE Mask */
+#define MXC_V_I3C_CAPABILITIES_CCCHANDLE_BASIC         ((uint32_t)0x1UL) /**< CAPABILITIES_CCCHANDLE_BASIC Mask */
+#define MXC_S_I3C_CAPABILITIES_CCCHANDLE_BASIC         (MXC_V_I3C_CAPABILITIES_CCCHANDLE_BASIC << MXC_F_I3C_CAPABILITIES_CCCHANDLE_POS) /**< CAPABILITIES_CCCHANDLE_BASIC Setting */
+#define MXC_V_I3C_CAPABILITIES_CCCHANDLE_LIMITS        ((uint32_t)0x2UL) /**< CAPABILITIES_CCCHANDLE_LIMITS Mask */
+#define MXC_S_I3C_CAPABILITIES_CCCHANDLE_LIMITS        (MXC_V_I3C_CAPABILITIES_CCCHANDLE_LIMITS << MXC_F_I3C_CAPABILITIES_CCCHANDLE_POS) /**< CAPABILITIES_CCCHANDLE_LIMITS Setting */
+#define MXC_V_I3C_CAPABILITIES_CCCHANDLE_INTACT        ((uint32_t)0x4UL) /**< CAPABILITIES_CCCHANDLE_INTACT Mask */
+#define MXC_S_I3C_CAPABILITIES_CCCHANDLE_INTACT        (MXC_V_I3C_CAPABILITIES_CCCHANDLE_INTACT << MXC_F_I3C_CAPABILITIES_CCCHANDLE_POS) /**< CAPABILITIES_CCCHANDLE_INTACT Setting */
+#define MXC_V_I3C_CAPABILITIES_CCCHANDLE_VENDOR        ((uint32_t)0x8UL) /**< CAPABILITIES_CCCHANDLE_VENDOR Mask */
+#define MXC_S_I3C_CAPABILITIES_CCCHANDLE_VENDOR        (MXC_V_I3C_CAPABILITIES_CCCHANDLE_VENDOR << MXC_F_I3C_CAPABILITIES_CCCHANDLE_POS) /**< CAPABILITIES_CCCHANDLE_VENDOR Setting */
 
 #define MXC_F_I3C_CAPABILITIES_IBI_MR_HJ_POS           16 /**< CAPABILITIES_IBI_MR_HJ Position */
 #define MXC_F_I3C_CAPABILITIES_IBI_MR_HJ               ((uint32_t)(0x1FUL << MXC_F_I3C_CAPABILITIES_IBI_MR_HJ_POS)) /**< CAPABILITIES_IBI_MR_HJ Mask */
+#define MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_IBI           ((uint32_t)0x1UL) /**< CAPABILITIES_IBI_MR_HJ_IBI Mask */
+#define MXC_S_I3C_CAPABILITIES_IBI_MR_HJ_IBI           (MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_IBI << MXC_F_I3C_CAPABILITIES_IBI_MR_HJ_POS) /**< CAPABILITIES_IBI_MR_HJ_IBI Setting */
+#define MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_IBI_PAYLOAD   ((uint32_t)0x2UL) /**< CAPABILITIES_IBI_MR_HJ_IBI_PAYLOAD Mask */
+#define MXC_S_I3C_CAPABILITIES_IBI_MR_HJ_IBI_PAYLOAD   (MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_IBI_PAYLOAD << MXC_F_I3C_CAPABILITIES_IBI_MR_HJ_POS) /**< CAPABILITIES_IBI_MR_HJ_IBI_PAYLOAD Setting */
+#define MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_CREQ          ((uint32_t)0x4UL) /**< CAPABILITIES_IBI_MR_HJ_CREQ Mask */
+#define MXC_S_I3C_CAPABILITIES_IBI_MR_HJ_CREQ          (MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_CREQ << MXC_F_I3C_CAPABILITIES_IBI_MR_HJ_POS) /**< CAPABILITIES_IBI_MR_HJ_CREQ Setting */
+#define MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_HOTJOIN       ((uint32_t)0x8UL) /**< CAPABILITIES_IBI_MR_HJ_HOTJOIN Mask */
+#define MXC_S_I3C_CAPABILITIES_IBI_MR_HJ_HOTJOIN       (MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_HOTJOIN << MXC_F_I3C_CAPABILITIES_IBI_MR_HJ_POS) /**< CAPABILITIES_IBI_MR_HJ_HOTJOIN Setting */
+#define MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_BAMATCH       ((uint32_t)0x10UL) /**< CAPABILITIES_IBI_MR_HJ_BAMATCH Mask */
+#define MXC_S_I3C_CAPABILITIES_IBI_MR_HJ_BAMATCH       (MXC_V_I3C_CAPABILITIES_IBI_MR_HJ_BAMATCH << MXC_F_I3C_CAPABILITIES_IBI_MR_HJ_POS) /**< CAPABILITIES_IBI_MR_HJ_BAMATCH Setting */
 
 #define MXC_F_I3C_CAPABILITIES_TIMECTRL_POS            21 /**< CAPABILITIES_TIMECTRL Position */
 #define MXC_F_I3C_CAPABILITIES_TIMECTRL                ((uint32_t)(0x1UL << MXC_F_I3C_CAPABILITIES_TIMECTRL_POS)) /**< CAPABILITIES_TIMECTRL Mask */

Libraries/CMSIS/Device/Maxim/MAX32657/Include/max32657.h

@@ -611,11 +611,11 @@ We may want to handle GET_IRQ better...
 #define MXC_I3C_FIFO_DEPTH (8) // TODO(ME30): Confirm this is correct.
 
 /* Non-secure Mapping */
-#define MXC_BASE_I3C_NS ((uint32_t)0x4001D000UL)
+#define MXC_BASE_I3C_NS ((uint32_t)0x40018000UL)
 #define MXC_I3C_NS ((mxc_i3c_regs_t *)MXC_BASE_I3C_NS)
 
 /* Secure Mapping */
-#define MXC_BASE_I3C_S ((uint32_t)0x5001D000UL)
+#define MXC_BASE_I3C_S ((uint32_t)0x50018000UL)
 #define MXC_I3C_S ((mxc_i3c_regs_t *)MXC_BASE_I3C_S)
 
 #if IS_SECURE_ENVIRONMENT
@@ -629,7 +629,6 @@ We may want to handle GET_IRQ better...
 #define MXC_I3C_GET_BASE(i) ((i) == MXC_I3C ? 0 : -1)
 #define MXC_I3C_GET_IDX(p) ((p) == MXC_I3C ? 0 : -1)
 
-
 /******************************************************************************/
 /*                                                                        DMA */
 #define MXC_DMA_CHANNELS (4)