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2.3.0: minor updates
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@acaldero
acaldero committed Jun 25, 2023
1 parent 24b5659 commit 4b3b8a2
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16 changes: 8 additions & 8 deletions README.md
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Expand Up @@ -43,9 +43,9 @@
```
* Get WepSIM by executing:
```bash
wget https://github.com/acaldero/wepsim/releases/download/v2.2.1/wepsim-2.2.1.zip
unzip wepsim-2.2.1.zip
cd wepsim-2.2.1
wget https://github.com/acaldero/wepsim/releases/download/v2.3.0/wepsim-2.3.0.zip
unzip wepsim-2.3.0.zip
cd wepsim-2.3.0
npm install terser jq jshint yargs clear inquirer fuzzy inquirer-command-prompt inquirer-autocomplete-prompt
```
* Execute wepsim.sh with the help flag in order to show the available command switches:
Expand Down Expand Up @@ -314,12 +314,12 @@ Micropc at 0x1. Activated signals are: TA R BW M1 C1. Associated actions are: Co
!echo "(1/4) Installing pre-requisites..."
!npm install terser jq jshint yargs clear inquirer >& /dev/null
!echo "(2/4) Downloading WepSIM..."
!wget https://github.com/acaldero/wepsim/releases/download/v2.2.1/wepsim-2.2.1.zip >& /dev/null
!unzip -o wepsim-2.2.1.zip >& /dev/null
!rm -fr wepsim-2.2.1.zip
!wget https://github.com/acaldero/wepsim/releases/download/v2.3.0/wepsim-2.3.0.zip >& /dev/null
!unzip -o wepsim-2.3.0.zip >& /dev/null
!rm -fr wepsim-2.3.0.zip
!echo "(3/4) Executing WepSIM..."
!./wepsim-2.2.1/wepsim.sh -a stepbystep -m ep -f ./wepsim-2.2.1/examples/microcode/mips/ep_base.mc -s ./wepsim-2.2.1/examples/assembly/mips/s1e1.asm > ./result.csv
!rm -fr wepsim-2.2.1
!./wepsim-2.3.0/wepsim.sh -a stepbystep -m ep -f ./wepsim-2.3.0/examples/microcode/mips/ep_base.mc -s ./wepsim-2.3.0/examples/assembly/mips/s1e1.asm > ./result.csv
!rm -fr wepsim-2.3.0
!echo "(4/4) Showing execution trace as table..."
import pandas as pd
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1 change: 1 addition & 0 deletions devel/mk_dist.sh
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Expand Up @@ -154,6 +154,7 @@ cat sim_core/sim_cfg.js \
sim_sw/assembly/memory_segments.js \
sim_sw/assembly/datatypes.js \
sim_sw/assembly/asm_v1.js \
sim_sw/assembly/asm_v2.js \
sim_sw/assembly.js > ws_dist/sim_all.js
terser -o ws_dist/min.sim_all.js ws_dist/sim_all.js
rm -fr ws_dist/sim_all.js
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524 changes: 261 additions & 263 deletions examples/hardware/poc/images/controlunit.svg
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2 changes: 1 addition & 1 deletion examples/hardware/poc/images/processor.svg
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24 changes: 12 additions & 12 deletions sim_hw/sim_hw_ep/sim_hw_cpu.js
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Expand Up @@ -601,62 +601,62 @@
sim.ep.signals["T1"] = { name: "T1", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 0", "MV BUS_IB REG_MBR; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 0"],
fire_name: ['svg_p:text3105'],
draw_data: [['svg_p:path3071','svg_p:path3049','svg_p:path3063-9','svg_p:path3071','svg_p:path3071','svg_p:path3069']],
draw_data: [['svg_p:path3065','svg_p:path3071','svg_p:path3049','svg_p:path3063-9','svg_p:path3071','svg_p:path3071','svg_p:path3069']],
draw_name: [['svg_p:path3067']] };
sim.ep.signals["T2"] = { name: "T2", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 1", "MV BUS_IB REG_PC; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 1"],
fire_name: ['svg_p:text3449'],
draw_data: [['svg_p:path3199', 'svg_p:path3201','svg_p:path3049']],
draw_data: [['svg_p:path3195','svg_p:path3199', 'svg_p:path3201','svg_p:path3049']],
draw_name: [['svg_p:path3329']] };
sim.ep.signals["T3"] = { name: "T3", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 2", "MV BUS_IB SELEC_T3; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 2"],
fire_name: ['svg_p:text3451'],
draw_data: [['svg_p:path3349', 'svg_p:path3931', 'svg_p:path3345','svg_p:path3049']],
draw_data: [['svg_p:path3347','svg_p:path3349', 'svg_p:path3931', 'svg_p:path3345','svg_p:path3049']],
draw_name: [['svg_p:path3351']] };
sim.ep.signals["T4"] = { name: "T4", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 3", "MV BUS_IB REG_RT1; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 3"],
fire_name: ['svg_p:text3453'],
draw_data: [['svg_p:path3261', 'svg_p:path3259','svg_p:path3049']],
draw_data: [['svg_p:path3257','svg_p:path3261', 'svg_p:path3259','svg_p:path3049']],
draw_name: [['svg_p:path3305']] };
sim.ep.signals["T5"] = { name: "T5", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 4", "MV BUS_IB REG_RT2; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 4"],
fire_name: ['svg_p:text3455'],
draw_data: [['svg_p:path3275', 'svg_p:path3273','svg_p:path3049']],
draw_data: [['svg_p:path3271','svg_p:path3275', 'svg_p:path3273','svg_p:path3049']],
draw_name: [['svg_p:path3307']] };
sim.ep.signals["T6"] = { name: "T6", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 5", "MV BUS_IB ALU_C6; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 5"],
fire_name: ['svg_p:text3457'],
draw_data: [['svg_p:path3589', 'svg_p:path3317', 'svg_p:path3163-2','svg_p:path3049','svg_p:path3321','svg_p:path3261-8','svg_p:path3317-9','svg_p:path3901-6-9']],
draw_data: [['svg_p:path3315','svg_p:path3589', 'svg_p:path3317', 'svg_p:path3163-2','svg_p:path3049','svg_p:path3321','svg_p:path3261-8','svg_p:path3317-9','svg_p:path3901-6-9']],
draw_name: [['svg_p:path3319']] };
sim.ep.signals["T7"] = { name: "T7", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 6", "MV BUS_IB REG_RT3; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 6"],
fire_name: ['svg_p:text3459'],
draw_data: [['svg_p:path3327', 'svg_p:path3311', 'svg_p:path3049']],
draw_data: [['svg_p:path3309','svg_p:path3327', 'svg_p:path3311', 'svg_p:path3049']],
draw_name: [['svg_p:path3313']] };
sim.ep.signals["T8"] = { name: "T8", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 7", "MV BUS_IB REG_SR; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 7"],
fire_name: ['svg_p:text3657'],
draw_data: [['svg_p:path3651', 'svg_p:path3647','svg_p:path3049']],
draw_data: [['svg_p:path3645','svg_p:path3651', 'svg_p:path3647','svg_p:path3049']],
draw_name: [['svg_p:path3649']] };
sim.ep.signals["T9"] = { name: "T9", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 8", "MV BUS_IB RA_T9; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 8"],
fire_name: ['svg_p:text3147'],
draw_data: [['svg_p:path3143', 'svg_p:path3139','svg_p:path3049','svg_p:path3143-9']],
draw_data: [['svg_p:path3131','svg_p:path3143', 'svg_p:path3139','svg_p:path3049','svg_p:path3143-9']],
draw_name: [['svg_p:path3133']] };
sim.ep.signals["T10"] = { name: "T10", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 9", "MV BUS_IB RB_T10; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 9"],
fire_name: ['svg_p:text3149'],
draw_data: [['svg_p:path3145', 'svg_p:path3141','svg_p:path3049','svg_p:path3145-5']],
draw_data: [['svg_p:path3135','svg_p:path3145', 'svg_p:path3141','svg_p:path3049','svg_p:path3145-5']],
draw_name: [['svg_p:path3137']] };
sim.ep.signals["T11"] = { name: "T11", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 10", "CP_FIELD BUS_IB REG_MICROINS/EXCODE; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 10"],
fire_name: ['svg_p:text3147-5','svg_cu:tspan4426'],
draw_data: [['svg_p:path3145', 'svg_p:path3081-3','svg_p:path3139-7','svg_p:path3049','svg_cu:path3081-3','svg_cu:path3139-7']],
draw_data: [['svg_p:path3131-3','svg_p:path3145', 'svg_p:path3081-3','svg_p:path3139-7','svg_p:path3049','svg_cu:path3081-3','svg_cu:path3139-7']],
draw_name: [['svg_p:path3133-6','svg_cu:path3133-6']] };
sim.ep.signals["T12"] = { name: "T12", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 11", "MV BUS_IB HPC_T12; FIRE M7; FIRE M2; FIRE M1; SET_TT TTCPU 11"],
fire_name: ['svg_p:text3147-5-0-1-1'],
draw_data: [['svg_p:path3139-7-1-4-3', 'svg_p:path3049', 'svg_p:path3081-3-8-5-3']],
draw_data: [['svg_p:path3131-3-8-4-31','svg_p:path3139-7-1-4-3', 'svg_p:path3049', 'svg_p:path3081-3-8-5-3']],
draw_name: [['svg_p:path3133-6-9-7-5']] };
/* MUX. */
sim.ep.signals["M1"] = { name: "M1", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
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22 changes: 11 additions & 11 deletions sim_hw/sim_hw_poc/sim_hw_cpu.js
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Expand Up @@ -531,57 +531,57 @@
sim.poc.signals["TA"] = { name: "TA", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP", "MV BUS_AB REG_MAR"],
fire_name: ['svg_p:text3091'],
draw_data: [['svg_p:path3089', 'svg_p:path3597', 'svg_p:path3513', 'svg_p:path3601', 'svg_p:path3601-2', 'svg_p:path3187', 'svg_p:path3087', 'svg_p:path2995','svg_p:path3535']],
draw_data: [['svg_p:path3083','svg_p:path3089', 'svg_p:path3597', 'svg_p:path3513', 'svg_p:path3601', 'svg_p:path3601-2', 'svg_p:path3187', 'svg_p:path3087', 'svg_p:path2995','svg_p:path3535']],
draw_name: [['svg_p:path3085']] };
sim.poc.signals["TD"] = { name: "TD", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; CHECK_RTD", "MV BUS_DB REG_MBR; FIRE R; FIRE W; CHECK_RTD"],
fire_name: ['svg_p:text3103'],
draw_data: [['svg_p:path3101','svg_p:path3587','svg_p:path3419-8','svg_p:path3071','svg_p:path3099','svg_p:path3097','svg_p:path3559-5','svg_p:path3419-1-0','svg_p:path3583','svg_p:path3419-1','svg_p:path3491','svg_p:path3641','svg_p:path3541']],
draw_data: [['svg_p:path3093','svg_p:path3101','svg_p:path3587','svg_p:path3419-8','svg_p:path3071','svg_p:path3099','svg_p:path3097','svg_p:path3559-5','svg_p:path3419-1-0','svg_p:path3583','svg_p:path3419-1','svg_p:path3491','svg_p:path3641','svg_p:path3541']],
draw_name: [['svg_p:path3095']] };
sim.poc.signals["T1"] = { name: "T1", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 0", "MV BUS_IB REG_MBR; FIRE M7; FIRE M1; SET_TT TTCPU 0"],
fire_name: ['svg_p:text3105'],
draw_data: [['svg_p:path3071', 'svg_p:path3069','svg_p:path3049','svg_p:path3063-9', 'svg_p:path3071']],
draw_data: [['svg_p:path3065','svg_p:path3071', 'svg_p:path3069','svg_p:path3049','svg_p:path3063-9', 'svg_p:path3071']],
draw_name: [['svg_p:path3067']] };
sim.poc.signals["T2"] = { name: "T2", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 1", "MV BUS_IB REG_PC; FIRE M7; FIRE M1; SET_TT TTCPU 1"],
fire_name: ['svg_p:text3449'],
draw_data: [['svg_p:path3199', 'svg_p:path3201','svg_p:path3049']],
draw_data: [['svg_p:path3195','svg_p:path3199', 'svg_p:path3201','svg_p:path3049']],
draw_name: [['svg_p:path3329']] };
sim.poc.signals["T3"] = { name: "T3", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 2", "MV BUS_IB SELEC_T3; FIRE M7; FIRE M1; SET_TT TTCPU 2"],
fire_name: ['svg_p:text3451'],
draw_data: [['svg_p:path3349', 'svg_p:path3931', 'svg_p:path3345','svg_p:path3049']],
draw_data: [['svg_p:path3347','svg_p:path3349', 'svg_p:path3931', 'svg_p:path3345','svg_p:path3049']],
draw_name: [['svg_p:path3351']] };
sim.poc.signals["T6"] = { name: "T6", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 3", "MV BUS_IB ALU_T6; FIRE M7; FIRE M1; SET_TT TTCPU 3"],
fire_name: ['svg_p:text3457'],
draw_data: [['svg_p:path3589', 'svg_p:path3317', 'svg_p:path3163-2','svg_p:path3049', 'svg_p:path3317-9', 'svg_p:path3321', 'svg_p:path3261-8']],
draw_data: [['svg_p:path3315','svg_p:path3589', 'svg_p:path3317', 'svg_p:path3163-2','svg_p:path3049', 'svg_p:path3317-9', 'svg_p:path3321', 'svg_p:path3261-8']],
draw_name: [['svg_p:path3319']] };
sim.poc.signals["T8"] = { name: "T8", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 4", "MV BUS_IB REG_SR; FIRE M7; FIRE M1; SET_TT TTCPU 4"],
fire_name: ['svg_p:text3657'],
draw_data: [['svg_p:path3651', 'svg_p:path3647','svg_p:path3049']],
draw_data: [['svg_p:path3645','svg_p:path3651', 'svg_p:path3647','svg_p:path3049']],
draw_name: [['svg_p:path3649']] };
sim.poc.signals["T9"] = { name: "T9", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 5", "MV BUS_IB RA_T9; FIRE M7; FIRE M1; SET_TT TTCPU 5"],
fire_name: ['svg_p:text3147'],
draw_data: [['svg_p:path3143', 'svg_p:path3139','svg_p:path3049','svg_p:path3143-9']],
draw_data: [['svg_p:path3131','svg_p:path3143', 'svg_p:path3139','svg_p:path3049','svg_p:path3143-9']],
draw_name: [['svg_p:path3133']] };
sim.poc.signals["T10"] = { name: "T10", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 6", "MV BUS_IB RB_T10; FIRE M7; FIRE M1; SET_TT TTCPU 6"],
fire_name: ['svg_p:text3149'],
draw_data: [['svg_p:path3145', 'svg_p:path3141','svg_p:path3049','svg_p:path3145-5']],
draw_data: [['svg_p:path3135','svg_p:path3145', 'svg_p:path3141','svg_p:path3049','svg_p:path3145-5']],
draw_name: [['svg_p:path3137']] };
sim.poc.signals["T11"] = { name: "T11", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 7", "CP_FIELD BUS_IB REG_MICROINS/EXCODE; FIRE M7; FIRE M1; SET_TT TTCPU 7"],
fire_name: ['svg_p:text3147-5','svg_cu:tspan4426'],
draw_data: [['svg_p:path3081-3','svg_p:path3139-7','svg_p:path3049','svg_cu:path3081-3','svg_cu:path3139-7','svg_cu:path3502']],
draw_data: [['svg_p:path3131-3','svg_p:path3081-3','svg_p:path3139-7','svg_p:path3049','svg_cu:path3081-3','svg_cu:path3139-7','svg_cu:path3502']],
draw_name: [['svg_p:path3133-6','svg_cu:path3133-6']] };
sim.poc.signals["T12"] = { name: "T12", visible: true, type: "L", value: 0, default_value:0, nbits: "1",
behavior: ["NOP; RST_TT TTCPU 8", "MV BUS_IB HPC_T12; FIRE M7; FIRE M1; SET_TT TTCPU 8"],
fire_name: ['svg_p:text3147-5-0-1-1'],
draw_data: [['svg_p:path3139-7-1-4-3','svg_cu:path3049']],
draw_data: [['svg_p:path3131-3-8-4-31','svg_p:path3139-7-1-4-3','svg_cu:path3049']],
draw_name: [['svg_cu:path3133-6-9-7-5']] };

/* MUX. */
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21 changes: 21 additions & 0 deletions sim_sw/assembly/asm_v2.js
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@@ -0,0 +1,21 @@
/*
* Copyright 2015-2023 Saul Alonso Monsalve, Javier Prieto Cepeda, Felix Garcia Carballeira, Alejandro Calderon Mateos
*
* This file is part of WepSIM.
*
* WepSIM is free software: you can redistribute it and/or modify
* it under the terms of the GNU Lesser General Public License as published by
* the Free Software Foundation, either version 3 of the License, or
* (at your option) any later version.
*
* WepSIM is distributed in the hope that it will be useful,
* but WITHOUT ANY WARRANTY; without even the implied warranty of
* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
* GNU Lesser General Public License for more details.
*
* You should have received a copy of the GNU Lesser General Public License
* along with WepSIM. If not, see <http://www.gnu.org/licenses/>.
*
*/


5 changes: 3 additions & 2 deletions wepsim_web/wepsim_uielto_about.js
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Expand Up @@ -69,12 +69,13 @@
" </div>" +
" </div>" +
"" +
' <div class="mx-auto mt-3 bg-white">' +
' <div class="mx-auto mt-3 bg-white rounded">' +
' <div class="row mx-auto">' +
' <span class="col me-auto"><img alt="ARCOS logo" src="images/arcos.svg" style="height:30pt" class="img-fluid rounded m-0 p-1" /></span>' +
' <span class="col me-auto"><img alt="ARCOS group logo" src="images/arcos.svg" style="height:30pt" class="img-fluid rounded m-0 p-1" /></span>' +
' <span class="col ms-auto"><img alt="Computer Science and Engineering Departament logo" src="images/dptoinf.png" class="img-fluid rounded m-0 p-0" /></span>' +
' </div>' +
' </div>' +
' <br/>' +
"" +
"</form>" ;

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42 changes: 38 additions & 4 deletions wepsim_web/wepsim_uielto_cpusvg.js
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Expand Up @@ -87,7 +87,9 @@

// get initial stroke-width and backup if needed
var w = o.getAttribute('stroke-width');
if (w == null) return;
if (w == null) {
w = 0.70 ;
}

var wb = o.getAttribute('backup-stroke-width');
if (wb == null) {
Expand Down Expand Up @@ -353,14 +355,14 @@
svg2.setAttribute('style', 'background-color:' + cfg_color_background);

// 2) path
var elements = svg.querySelectorAll("path")
var elements = svg.querySelectorAll("path") ;
for (var i = 0; i < elements.length; i++) {
elements[i].style.fill = cfg_color_data_inactive ;
elements[i].setAttribute('stroke', cfg_color_data_inactive);
elements[i].setAttribute('stroke', cfg_color_data_inactive) ;
}

// 3) text
var elements = svg.querySelectorAll("text")
var elements = svg.querySelectorAll("text") ;
for (var i = 0; i < elements.length; i++) {
elements[i].style.fill = cfg_color_data_inactive ;
}
Expand Down Expand Up @@ -406,3 +408,35 @@
}
}

function wepsim_svg_reload_full ( id_arr, img_arr )
{
var o = null ;
var a = null ;

// set darkmode
wepsim_svg_update_drawing() ;

// reload svg (just in case)
for (var i in id_arr)
{
// skip empty image
if ( ('' == img_arr[i]) || (null == img_arr[i]) ) {
continue ;
}

// skip invalid id value
o = document.getElementById(id_arr[i]) ;
if (o === null) {
continue ;
}

// set dark-mode after load
o.onload = function(obj) {
wepsim_svg_apply_darkmode(obj.currentTarget.id) ;
} ;

// load image
o.setAttribute('data', img_arr[i]) ;
}
}

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