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Draft Extension: Zjpm #93

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7026501
UNRATIFIED RISC-V: Add Pointer masking extensions and their TENTATIVE…
a4lg Sep 11, 2022
e7c068b
TEST: Add instantiation script on CSR allocation
a4lg Oct 25, 2022
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7 changes: 7 additions & 0 deletions bfd/elfxx-riscv.c
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Expand Up @@ -1182,11 +1182,14 @@ static struct riscv_implicit_subset riscv_implicit_subsets[] =
{"zcf", "zca", check_implicit_always},
{"zcd", "zca", check_implicit_always},
{"zcb", "zca", check_implicit_always},
{"zjpm", "zicsr", check_implicit_always},
{"smaia", "ssaia", check_implicit_always},
{"smjpm", "zicsr", check_implicit_always},
{"smstateen", "ssstateen", check_implicit_always},
{"smepmp", "zicsr", check_implicit_always},
{"ssaia", "zicsr", check_implicit_always},
{"sscofpmf", "zicsr", check_implicit_always},
{"ssjpm", "zicsr", check_implicit_always},
{"ssstateen", "zicsr", check_implicit_always},
{"sstc", "zicsr", check_implicit_always},
{NULL, NULL, NULL}
Expand Down Expand Up @@ -1283,6 +1286,7 @@ static struct riscv_supported_ext riscv_supported_std_z_ext[] =
{"zksed", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zksh", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zkt", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zjpm", ISA_SPEC_CLASS_DRAFT, 0, 5, 0 },
{"zve32x", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zve32f", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"zve64x", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
Expand Down Expand Up @@ -1329,9 +1333,12 @@ static struct riscv_supported_ext riscv_supported_std_s_ext[] =
{
{"smaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smepmp", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"smjpm", ISA_SPEC_CLASS_DRAFT, 0, 5, 0 },
{"smjpmbare16", ISA_SPEC_CLASS_DRAFT, 0, 5, 0 },
{"smstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssaia", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"sscofpmf", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"ssjpm", ISA_SPEC_CLASS_DRAFT, 0, 5, 0 },
{"ssstateen", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"sstc", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
{"svinval", ISA_SPEC_CLASS_DRAFT, 1, 0, 0 },
Expand Down
16 changes: 16 additions & 0 deletions gas/config/tc-riscv.c
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Expand Up @@ -68,18 +68,22 @@ enum riscv_csr_class
CSR_CLASS_I_32, /* rv32 only */
CSR_CLASS_F, /* f-ext only */
CSR_CLASS_ZKR, /* zkr only */
CSR_CLASS_ZJPM, /* zjpm only */
CSR_CLASS_V, /* rvv only */
CSR_CLASS_DEBUG, /* debug CSR */
CSR_CLASS_H, /* hypervisor */
CSR_CLASS_H_32, /* hypervisor, rv32 only */
CSR_CLASS_SMAIA, /* Smaia */
CSR_CLASS_SMAIA_32, /* Smaia, rv32 only */
CSR_CLASS_SMJPM, /* Smjpm */
CSR_CLASS_SMSTATEEN, /* Smstateen only */
CSR_CLASS_SMSTATEEN_32, /* Smstateen RV32 only */
CSR_CLASS_SSAIA, /* Ssaia */
CSR_CLASS_SSAIA_AND_H, /* Ssaia with H */
CSR_CLASS_SSAIA_32, /* Ssaia, rv32 only */
CSR_CLASS_SSAIA_AND_H_32, /* Ssaia with H, rv32 only */
CSR_CLASS_SSJPM, /* Ssjpm */
CSR_CLASS_SSJPM_AND_H, /* Ssjpm with H */
CSR_CLASS_SSSTATEEN, /* S[ms]stateen only */
CSR_CLASS_SSSTATEEN_AND_H, /* S[ms]stateen only (with H) */
CSR_CLASS_SSSTATEEN_AND_H_32, /* S[ms]stateen RV32 only (with H) */
Expand Down Expand Up @@ -1043,6 +1047,9 @@ riscv_csr_address (const char *csr_name,
case CSR_CLASS_ZKR:
extension = "zkr";
break;
case CSR_CLASS_ZJPM:
extension = "zjpm";
break;
case CSR_CLASS_V:
extension = "zve32x";
break;
Expand All @@ -1052,6 +1059,9 @@ riscv_csr_address (const char *csr_name,
case CSR_CLASS_SMAIA:
extension = "smaia";
break;
case CSR_CLASS_SMJPM:
extension = "smjpm";
break;
case CSR_CLASS_SMSTATEEN_32:
is_rv32_only = true;
/* Fall through. */
Expand All @@ -1068,6 +1078,12 @@ riscv_csr_address (const char *csr_name,
|| csr_class == CSR_CLASS_SSAIA_AND_H_32);
extension = "ssaia";
break;
case CSR_CLASS_SSJPM_AND_H:
is_h_required = true;
/* Fall through. */
case CSR_CLASS_SSJPM:
extension = "ssjpm";
break;
case CSR_CLASS_SSSTATEEN_AND_H_32:
is_rv32_only = true;
/* Fall through. */
Expand Down
4 changes: 4 additions & 0 deletions gas/testsuite/gas/riscv/csr-dw-regnums.d
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Expand Up @@ -456,4 +456,8 @@ Contents of the .* section:
DW_CFA_offset_extended_sf: r7200 \(vl\) at cfa\+12416
DW_CFA_offset_extended_sf: r7201 \(vtype\) at cfa\+12420
DW_CFA_offset_extended_sf: r7202 \(vlenb\) at cfa\+12424
DW_CFA_offset_extended_sf: r6080 \(mpm\) at cfa\+7936
DW_CFA_offset_extended_sf: r5568 \(spm\) at cfa\+5888
DW_CFA_offset_extended_sf: r6336 \(upm\) at cfa\+8960
DW_CFA_offset_extended_sf: r5824 \(vspm\) at cfa\+6912
#...
5 changes: 5 additions & 0 deletions gas/testsuite/gas/riscv/csr-dw-regnums.s
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Expand Up @@ -459,5 +459,10 @@ _start:
.cfi_offset vl, 12416
.cfi_offset vtype, 12420
.cfi_offset vlenb, 12424
# Zjpm extension (both privileged and unprivileged)
.cfi_offset mpm, 7936
.cfi_offset spm, 5888
.cfi_offset upm, 8960
.cfi_offset vspm, 6912
nop
.cfi_endproc
8 changes: 8 additions & 0 deletions gas/testsuite/gas/riscv/csr-version-1p10.d
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Expand Up @@ -887,3 +887,11 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+c2159073[ ]+csrw[ ]+vtype,a1
[ ]+[0-9a-f]+:[ ]+c2202573[ ]+csrr[ ]+a0,vlenb
[ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
[ ]+[0-9a-f]+:[ ]+7c002573[ ]+csrr[ ]+a0,mpm
[ ]+[0-9a-f]+:[ ]+7c059073[ ]+csrw[ ]+mpm,a1
[ ]+[0-9a-f]+:[ ]+5c002573[ ]+csrr[ ]+a0,spm
[ ]+[0-9a-f]+:[ ]+5c059073[ ]+csrw[ ]+spm,a1
[ ]+[0-9a-f]+:[ ]+8c002573[ ]+csrr[ ]+a0,upm
[ ]+[0-9a-f]+:[ ]+8c059073[ ]+csrw[ ]+upm,a1
[ ]+[0-9a-f]+:[ ]+6c002573[ ]+csrr[ ]+a0,vspm
[ ]+[0-9a-f]+:[ ]+6c059073[ ]+csrw[ ]+vspm,a1
20 changes: 20 additions & 0 deletions gas/testsuite/gas/riscv/csr-version-1p10.l
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Expand Up @@ -1589,3 +1589,23 @@
.*Info: macro .*
.*Warning: read-only CSR is written `csrw vlenb,a1'
.*Info: macro .*
.*Warning: invalid CSR `mpm', needs `smjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `mpm', needs `smjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `spm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `spm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `upm', needs `zjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `upm', needs `zjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `h' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `h' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `ssjpm' extension
.*Info: macro .*
8 changes: 8 additions & 0 deletions gas/testsuite/gas/riscv/csr-version-1p11.d
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Expand Up @@ -887,3 +887,11 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+c2159073[ ]+csrw[ ]+vtype,a1
[ ]+[0-9a-f]+:[ ]+c2202573[ ]+csrr[ ]+a0,vlenb
[ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
[ ]+[0-9a-f]+:[ ]+7c002573[ ]+csrr[ ]+a0,mpm
[ ]+[0-9a-f]+:[ ]+7c059073[ ]+csrw[ ]+mpm,a1
[ ]+[0-9a-f]+:[ ]+5c002573[ ]+csrr[ ]+a0,spm
[ ]+[0-9a-f]+:[ ]+5c059073[ ]+csrw[ ]+spm,a1
[ ]+[0-9a-f]+:[ ]+8c002573[ ]+csrr[ ]+a0,upm
[ ]+[0-9a-f]+:[ ]+8c059073[ ]+csrw[ ]+upm,a1
[ ]+[0-9a-f]+:[ ]+6c002573[ ]+csrr[ ]+a0,vspm
[ ]+[0-9a-f]+:[ ]+6c059073[ ]+csrw[ ]+vspm,a1
20 changes: 20 additions & 0 deletions gas/testsuite/gas/riscv/csr-version-1p11.l
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Expand Up @@ -1585,3 +1585,23 @@
.*Info: macro .*
.*Warning: read-only CSR is written `csrw vlenb,a1'
.*Info: macro .*
.*Warning: invalid CSR `mpm', needs `smjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `mpm', needs `smjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `spm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `spm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `upm', needs `zjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `upm', needs `zjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `h' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `h' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `ssjpm' extension
.*Info: macro .*
8 changes: 8 additions & 0 deletions gas/testsuite/gas/riscv/csr-version-1p12.d
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Expand Up @@ -887,3 +887,11 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+c2159073[ ]+csrw[ ]+vtype,a1
[ ]+[0-9a-f]+:[ ]+c2202573[ ]+csrr[ ]+a0,vlenb
[ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
[ ]+[0-9a-f]+:[ ]+7c002573[ ]+csrr[ ]+a0,mpm
[ ]+[0-9a-f]+:[ ]+7c059073[ ]+csrw[ ]+mpm,a1
[ ]+[0-9a-f]+:[ ]+5c002573[ ]+csrr[ ]+a0,spm
[ ]+[0-9a-f]+:[ ]+5c059073[ ]+csrw[ ]+spm,a1
[ ]+[0-9a-f]+:[ ]+8c002573[ ]+csrr[ ]+a0,upm
[ ]+[0-9a-f]+:[ ]+8c059073[ ]+csrw[ ]+upm,a1
[ ]+[0-9a-f]+:[ ]+6c002573[ ]+csrr[ ]+a0,vspm
[ ]+[0-9a-f]+:[ ]+6c059073[ ]+csrw[ ]+vspm,a1
20 changes: 20 additions & 0 deletions gas/testsuite/gas/riscv/csr-version-1p12.l
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Expand Up @@ -1349,3 +1349,23 @@
.*Info: macro .*
.*Warning: read-only CSR is written `csrw vlenb,a1'
.*Info: macro .*
.*Warning: invalid CSR `mpm', needs `smjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `mpm', needs `smjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `spm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `spm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `upm', needs `zjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `upm', needs `zjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `h' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `h' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `ssjpm' extension
.*Info: macro .*
8 changes: 8 additions & 0 deletions gas/testsuite/gas/riscv/csr-version-1p9p1.d
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Expand Up @@ -887,3 +887,11 @@ Disassembly of section .text:
[ ]+[0-9a-f]+:[ ]+c2159073[ ]+csrw[ ]+vtype,a1
[ ]+[0-9a-f]+:[ ]+c2202573[ ]+csrr[ ]+a0,vlenb
[ ]+[0-9a-f]+:[ ]+c2259073[ ]+csrw[ ]+vlenb,a1
[ ]+[0-9a-f]+:[ ]+7c002573[ ]+csrr[ ]+a0,mpm
[ ]+[0-9a-f]+:[ ]+7c059073[ ]+csrw[ ]+mpm,a1
[ ]+[0-9a-f]+:[ ]+5c002573[ ]+csrr[ ]+a0,spm
[ ]+[0-9a-f]+:[ ]+5c059073[ ]+csrw[ ]+spm,a1
[ ]+[0-9a-f]+:[ ]+8c002573[ ]+csrr[ ]+a0,upm
[ ]+[0-9a-f]+:[ ]+8c059073[ ]+csrw[ ]+upm,a1
[ ]+[0-9a-f]+:[ ]+6c002573[ ]+csrr[ ]+a0,vspm
[ ]+[0-9a-f]+:[ ]+6c059073[ ]+csrw[ ]+vspm,a1
20 changes: 20 additions & 0 deletions gas/testsuite/gas/riscv/csr-version-1p9p1.l
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Expand Up @@ -1641,3 +1641,23 @@
.*Info: macro .*
.*Warning: read-only CSR is written `csrw vlenb,a1'
.*Info: macro .*
.*Warning: invalid CSR `mpm', needs `smjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `mpm', needs `smjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `spm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `spm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `upm', needs `zjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `upm', needs `zjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `h' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `ssjpm' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `h' extension
.*Info: macro .*
.*Warning: invalid CSR `vspm', needs `ssjpm' extension
.*Info: macro .*
6 changes: 6 additions & 0 deletions gas/testsuite/gas/riscv/csr.s
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Expand Up @@ -504,3 +504,9 @@
csr vl
csr vtype
csr vlenb

# Pointer masking (Zjpm extension)
csr mpm
csr spm
csr upm
csr vspm
10 changes: 10 additions & 0 deletions include/opcode/riscv-opc.h
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Expand Up @@ -2988,6 +2988,11 @@
#define CSR_VL 0xc20
#define CSR_VTYPE 0xc21
#define CSR_VLENB 0xc22
/* Zjpm extension CSR addresses (both privileged and unprivileged). */
#define CSR_MPM 0x7c0 /* TENTATIVELY use custom CSR address. */
#define CSR_SPM 0x5c0 /* TENTATIVELY use custom CSR address. */
#define CSR_UPM 0x8c0 /* TENTATIVELY use custom CSR address. */
#define CSR_VSPM 0x6c0 /* TENTATIVELY use custom CSR address. */
#endif /* RISCV_ENCODING_H */
#ifdef DECLARE_INSN
DECLARE_INSN(slli_rv32, MATCH_SLLI_RV32, MASK_SLLI_RV32)
Expand Down Expand Up @@ -3993,6 +3998,11 @@ DECLARE_CSR(vcsr, CSR_VCSR, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_N
DECLARE_CSR(vl, CSR_VL, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(vtype, CSR_VTYPE, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(vlenb, CSR_VLENB, CSR_CLASS_V, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
/* Zjpm extension CSRs (both privileged and unprivileged; tentative). */
DECLARE_CSR(mpm, CSR_MPM, CSR_CLASS_SMJPM, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(spm, CSR_SPM, CSR_CLASS_SSJPM, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(upm, CSR_UPM, CSR_CLASS_ZJPM, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
DECLARE_CSR(vspm, CSR_VSPM, CSR_CLASS_SSJPM_AND_H, PRIV_SPEC_CLASS_NONE, PRIV_SPEC_CLASS_NONE)
#endif /* DECLARE_CSR */
#ifdef DECLARE_CSR_ALIAS
DECLARE_CSR_ALIAS(ubadaddr, CSR_UTVAL, CSR_CLASS_I, PRIV_SPEC_CLASS_1P9P1, PRIV_SPEC_CLASS_1P10)
Expand Down
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