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A simple isolated amplifier driver for testing power electronics. It digitizes the analog signal from a function generator and generates complementary PWM for driving an external off-the-shelf H-bridge. Based on a Lattice MachXO2 breakout board and any external sigma-delta ADC with up to 20 MHz clock rate.

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Bench waveform amplifier

A simple isolated amplifier driver for testing power electronics that digitizes the analog signal from a function generator and generates complementary PWM for driving an external off-the-shelf H-bridge.

To use it, you will need a Lattice MachXO2 breakout board and any sigma-delta ADC (possibly isolated) that supports up to 20 MHz external clock rate, plus an external power stage that accepts PWM inputs (which can be either an off-the-shelf unit, including some DC motor driver boards, or the device-under-test itself). The dynamic range of the ADC defines the dynamic range of the analog signal accepted from the function generator.

Internally, the device implements a CIC decimator with a FIR compensator to accurately convert the PDM from the ADC into PCM, which is then fed into the PWM generator with dead-time insertion.

The frequency response of the CIC+FIR pipeline is shown below for the configuration with the decimation factor of 128; at 20 MHz ADC clock rate this results in the output update rate of 156.25 kHz, and the PWM frequncy is half of that (the compare register is updated twice per PWM period), 78.125 kHz. The gain is very flat in the passband thanks to the compensation FIR.

The circuit has an output enable pin that needs to be tied high to enable PWM outputs.

FPGA pinout

For the most up-to-date pinout please refer to the Diamond project.

+----------------+----------+--------------+-------+-----------+-----------+--------------------------------------+
| Port Name      | Pin/Bank | Buffer Type  | Site  | PG Enable | BC Enable | Properties                           |
+----------------+----------+--------------+-------+-----------+-----------+--------------------------------------+
| arst_n         | 35/3     | LVCMOS33_IN  | PL25B |           |           | PULL:UP CLAMP:ON HYSTERESIS:LARGE    |
| pwm_out_enable | 45/2     | LVCMOS33_IN  | PB12B |           |           | PULL:DOWN CLAMP:ON HYSTERESIS:LARGE  |
| pwm_out_neg    | 40/2     | LVCMOS33_OUT | PB6A  |           |           | DRIVE:8mA SLEW:FAST                  |
| pwm_out_neg_n  | 38/2     | LVCMOS33_OUT | PB4A  |           |           | DRIVE:8mA SLEW:FAST                  |
| pwm_out_pos    | 41/2     | LVCMOS33_OUT | PB6B  |           |           | DRIVE:8mA SLEW:FAST                  |
| pwm_out_pos_n  | 39/2     | LVCMOS33_OUT | PB4B  |           |           | DRIVE:8mA SLEW:FAST                  |
| sdadc_clk      | 1/5      | LVCMOS33_OUT | PL3A  |           |           | DRIVE:8mA SLEW:FAST                  |
| sdadc_data     | 2/5      | LVCMOS33_IN  | PL3B  |           |           | PULL:DOWN CLAMP:ON HYSTERESIS:SMALL  |
+----------------+----------+--------------+-------+-----------+-----------+--------------------------------------+

Building

Open the project in Diamond Lattice and run the synthesis process, then upload the configuration onto the connected breakout board. Wire the board as shown in the Pin Assignments tab, power up and go.

About

A simple isolated amplifier driver for testing power electronics. It digitizes the analog signal from a function generator and generates complementary PWM for driving an external off-the-shelf H-bridge. Based on a Lattice MachXO2 breakout board and any external sigma-delta ADC with up to 20 MHz clock rate.

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