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PaebbelsPaebbels
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Merge pull request #2 from Paebbels/paebbels/master
Adding new config files and clock networks for common Xilinx/Digilent boards
2 parents 543e975 + 09dc153 commit 016f474

30 files changed

+2999
-1171
lines changed

‎src/cache/cachetest_Atlys.vhdl

Lines changed: 7 additions & 7 deletions
Original file line numberDiff line numberDiff line change
@@ -79,7 +79,7 @@ end entity cachetest_Atlys;
7979
architecture rtl of cachetest_Atlys is
8080
signal memtest0_status : std_logic_vector(2 downto 0);
8181

82-
-- Memory Controller signals
82+
-- Memory Controller signals
8383
-- signal c3_sys_rst_i : std_logic;
8484
signal c3_calib_done : std_logic;
8585
signal c3_clk0 : std_logic; -- output from IP core
@@ -112,8 +112,8 @@ architecture rtl of cachetest_Atlys is
112112
begin -- architecture rtl
113113

114114
-----------------------------------------------------------------------------
115-
-- MemoryTester for Port 0
116-
-----------------------------------------------------------------------------
115+
-- MemoryTester for Port 0
116+
-----------------------------------------------------------------------------
117117
MemoryTester0 : block
118118
constant MEM_BYTE_ADDR_BITS : natural := 4; -- 16 Byte / Word
119119
constant MEM_WORD_ADDR_BITS : natural :=
@@ -238,7 +238,7 @@ begin -- architecture rtl
238238
mcb3_rzq => mcb3_rzq,
239239
mcb3_dram_udm => mcb3_dram_udm,
240240
c3_sys_clk => Atlys_SystemClock_100MHz,
241-
c3_sys_rst_i => '0', -- active high
241+
c3_sys_rst_i => '0', -- active high
242242
c3_calib_done => c3_calib_done,
243243
c3_clk0 => c3_clk0,
244244
c3_rst0 => c3_rst0,
@@ -271,9 +271,9 @@ begin -- architecture rtl
271271
c3_p0_rd_overflow => c3_p0_rd_overflow,
272272
c3_p0_rd_error => c3_p0_rd_error);
273273

274-
-----------------------------------------------------------------------------
275-
-- Status outputs
276-
-----------------------------------------------------------------------------
274+
-----------------------------------------------------------------------------
275+
-- Status outputs
276+
-----------------------------------------------------------------------------
277277
Atlys_GPIO_LED(7) <= c3_rst0;
278278
Atlys_GPIO_LED(6) <= '0';
279279
Atlys_GPIO_LED(5) <= '0';

‎src/cache/cachetest_KC705_Vivado.vhdl

Lines changed: 4 additions & 4 deletions
Original file line numberDiff line numberDiff line change
@@ -160,7 +160,7 @@ begin -- architecture rtl
160160
refclk_bufg : bufg
161161
port map (
162162
I => sysclk_unbuf,
163-
O => refclk); -- buffered 200 MHz reference clock
163+
O => refclk); -- buffered 200 MHz reference clock
164164

165165
-----------------------------------------------------------------------------
166166
-- MemoryTester
@@ -318,11 +318,11 @@ begin -- architecture rtl
318318
app_rd_data_valid => app_rd_data_valid,
319319
app_rdy => app_rdy,
320320
app_wdf_rdy => app_wdf_rdy,
321-
app_sr_req => '0', -- reserved
321+
app_sr_req => '0', -- reserved
322322
app_sr_active => open,
323-
app_ref_req => '0', -- unused
323+
app_ref_req => '0', -- unused
324324
app_ref_ack => open,
325-
app_zq_req => '0', -- unused
325+
app_zq_req => '0', -- unused
326326
app_zq_ack => open,
327327
ui_clk => ui_clk,
328328
ui_clk_sync_rst => ui_clk_sync_rst,

‎src/common/my_config_ArtyA7_100.vhdl

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
2+
-- vim: tabstop=2:shiftwidth=2:noexpandtab
3+
-- kate: tab-width 2; replace-tabs off; indent-width 2;
4+
--
5+
-- =============================================================================
6+
-- Authors: Patrick Lehmann
7+
--
8+
-- Package: Project specific configuration.
9+
--
10+
-- Description:
11+
-- ------------------------------------
12+
-- Configuration file for a Digilent ArtyA7-100 board.
13+
--
14+
--
15+
-- License:
16+
-- =============================================================================
17+
-- Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany
18+
--
19+
-- Licensed under the Apache License, Version 2.0 (the "License");
20+
-- you may not use this file except in compliance with the License.
21+
-- You may obtain a copy of the License at
22+
--
23+
-- http://www.apache.org/licenses/LICENSE-2.0
24+
--
25+
-- Unless required by applicable law or agreed to in writing, software
26+
-- distributed under the License is distributed on an "AS IS" BASIS,
27+
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
28+
-- See the License for the specific language governing permissions and
29+
-- limitations under the License.
30+
-- =============================================================================
31+
--
32+
--
33+
package my_config is
34+
-- Change these lines to setup configuration.
35+
constant MY_BOARD : string := "ArtyA7-100"; -- Digilent ArtyA7-100 - Xilinx Artix-7: XC7A100T
36+
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
37+
38+
-- For internal use only
39+
constant MY_VERBOSE : boolean := FALSE;
40+
end package;

‎src/common/my_config_ArtyA7_35.vhdl

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
2+
-- vim: tabstop=2:shiftwidth=2:noexpandtab
3+
-- kate: tab-width 2; replace-tabs off; indent-width 2;
4+
--
5+
-- =============================================================================
6+
-- Authors: Patrick Lehmann
7+
--
8+
-- Package: Project specific configuration.
9+
--
10+
-- Description:
11+
-- ------------------------------------
12+
-- Configuration file for a Digilent ArtyA7-35 board.
13+
--
14+
--
15+
-- License:
16+
-- =============================================================================
17+
-- Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany
18+
--
19+
-- Licensed under the Apache License, Version 2.0 (the "License");
20+
-- you may not use this file except in compliance with the License.
21+
-- You may obtain a copy of the License at
22+
--
23+
-- http://www.apache.org/licenses/LICENSE-2.0
24+
--
25+
-- Unless required by applicable law or agreed to in writing, software
26+
-- distributed under the License is distributed on an "AS IS" BASIS,
27+
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
28+
-- See the License for the specific language governing permissions and
29+
-- limitations under the License.
30+
-- =============================================================================
31+
--
32+
--
33+
package my_config is
34+
-- Change these lines to setup configuration.
35+
constant MY_BOARD : string := "ArtyA7-35"; -- Digilent ArtyA7-35 - Xilinx Artix-7: XC7A35T
36+
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
37+
38+
-- For internal use only
39+
constant MY_VERBOSE : boolean := FALSE;
40+
end package;

‎src/common/my_config_ArtyS7_50.vhdl

Lines changed: 40 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,40 @@
1+
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
2+
-- vim: tabstop=2:shiftwidth=2:noexpandtab
3+
-- kate: tab-width 2; replace-tabs off; indent-width 2;
4+
--
5+
-- =============================================================================
6+
-- Authors: Patrick Lehmann
7+
--
8+
-- Package: Project specific configuration.
9+
--
10+
-- Description:
11+
-- ------------------------------------
12+
-- Configuration file for a Digilent ArtyS7-50 board.
13+
--
14+
--
15+
-- License:
16+
-- =============================================================================
17+
-- Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany
18+
--
19+
-- Licensed under the Apache License, Version 2.0 (the "License");
20+
-- you may not use this file except in compliance with the License.
21+
-- You may obtain a copy of the License at
22+
--
23+
-- http://www.apache.org/licenses/LICENSE-2.0
24+
--
25+
-- Unless required by applicable law or agreed to in writing, software
26+
-- distributed under the License is distributed on an "AS IS" BASIS,
27+
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
28+
-- See the License for the specific language governing permissions and
29+
-- limitations under the License.
30+
-- =============================================================================
31+
--
32+
--
33+
package my_config is
34+
-- Change these lines to setup configuration.
35+
constant MY_BOARD : string := "ArtyS7-50"; -- Digilent ArtyS7-50 - Xilinx Spartan-7: XC7S50
36+
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
37+
38+
-- For internal use only
39+
constant MY_VERBOSE : boolean := FALSE;
40+
end package;

‎src/common/my_config_Atlys.vhdl

Lines changed: 7 additions & 8 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,6 @@
11
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
22
-- vim: tabstop=2:shiftwidth=2:noexpandtab
33
-- kate: tab-width 2; replace-tabs off; indent-width 2;
4-
--
54
-- =============================================================================
65
-- Authors: Thomas B. Preusser
76
-- Martin Zabel
@@ -11,7 +10,7 @@
1110
--
1211
-- Description:
1312
-- ------------------------------------
14-
-- This file was created from template <PoCRoot>/src/common/my_config.template.vhdl.
13+
-- Configuration file for a Xilinx Atlys board.
1514
--
1615
--
1716
-- License:
@@ -31,13 +30,13 @@
3130
-- See the License for the specific language governing permissions and
3231
-- limitations under the License.
3332
-- =============================================================================
34-
35-
33+
--
34+
--
3635
package my_config is
37-
-- Change these lines to setup configuration.
38-
constant MY_BOARD : string := "Atlys"; -- Digilent Atlys - Xilinx Spartan-6: XC6SLX45
39-
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
36+
-- Change these lines to setup configuration.
37+
constant MY_BOARD : string := "Atlys"; -- Digilent Atlys - Xilinx Spartan-6: XC6SLX45
38+
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
4039

4140
-- For internal use only
42-
constant MY_VERBOSE : boolean := FALSE;
41+
constant MY_VERBOSE : boolean := FALSE;
4342
end package;

‎src/common/my_config_DE0.vhdl

Lines changed: 7 additions & 10 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,6 @@
11
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
22
-- vim: tabstop=2:shiftwidth=2:noexpandtab
33
-- kate: tab-width 2; replace-tabs off; indent-width 2;
4-
--
54
-- =============================================================================
65
-- Authors: Thomas B. Preusser
76
-- Martin Zabel
@@ -11,7 +10,7 @@
1110
--
1211
-- Description:
1312
-- ------------------------------------
14-
-- This file was created from template <PoCRoot>/src/common/my_config.template.vhdl.
13+
-- Configuration file for a Altera DE0 board.
1514
--
1615
--
1716
-- License:
@@ -31,15 +30,13 @@
3130
-- See the License for the specific language governing permissions and
3231
-- limitations under the License.
3332
-- =============================================================================
34-
35-
library PoC;
36-
37-
33+
--
34+
--
3835
package my_config is
39-
-- Change these lines to setup configuration.
40-
constant MY_BOARD : string := "DE0"; -- Altera DE0 Board (Cyclone III)
41-
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
36+
-- Change these lines to setup configuration.
37+
constant MY_BOARD : string := "DE0"; -- Altera DE0 Board (Cyclone III)
38+
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
4239

4340
-- For internal use only
44-
constant MY_VERBOSE : boolean := FALSE;
41+
constant MY_VERBOSE : boolean := FALSE;
4542
end package;

‎src/common/my_config_DE4.vhdl

Lines changed: 8 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,6 @@
11
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
22
-- vim: tabstop=2:shiftwidth=2:noexpandtab
33
-- kate: tab-width 2; replace-tabs off; indent-width 2;
4-
--
54
-- =============================================================================
65
-- Authors: Thomas B. Preusser
76
-- Martin Zabel
@@ -11,7 +10,7 @@
1110
--
1211
-- Description:
1312
-- ------------------------------------
14-
-- This file was created from template <PoCRoot>/src/common/my_config.template.vhdl.
13+
-- Configuration file for a Altera DE4 board.
1514
--
1615
--
1716
-- License:
@@ -31,20 +30,13 @@
3130
-- See the License for the specific language governing permissions and
3231
-- limitations under the License.
3332
-- =============================================================================
34-
35-
library PoC;
36-
37-
33+
--
34+
--
3835
package my_config is
39-
-- Change these lines to setup configuration.
40-
constant MY_BOARD : string := "DE4"; -- Stratix IV GX
41-
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
36+
-- Change these lines to setup configuration.
37+
constant MY_BOARD : string := "DE4"; -- Stratix IV GX
38+
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
4239

4340
--
44-
constant MY_VERBOSE : boolean := false; -- activate detailed report statements in functions and procedures
45-
end;
46-
47-
48-
package body my_config is
49-
50-
end;
41+
constant MY_VERBOSE : boolean := FALSE; -- activate detailed report statements in functions and procedures
42+
end package;

‎src/common/my_config_KC705.vhdl

Lines changed: 8 additions & 16 deletions
Original file line numberDiff line numberDiff line change
@@ -1,7 +1,6 @@
11
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
22
-- vim: tabstop=2:shiftwidth=2:noexpandtab
33
-- kate: tab-width 2; replace-tabs off; indent-width 2;
4-
--
54
-- =============================================================================
65
-- Authors: Thomas B. Preusser
76
-- Martin Zabel
@@ -11,7 +10,7 @@
1110
--
1211
-- Description:
1312
-- ------------------------------------
14-
-- This file was created from template <PoCRoot>/src/common/my_config.template.vhdl.
13+
-- Configuration file for a Xilinx KC705 board.
1514
--
1615
--
1716
-- License:
@@ -31,20 +30,13 @@
3130
-- See the License for the specific language governing permissions and
3231
-- limitations under the License.
3332
-- =============================================================================
34-
35-
library PoC;
36-
37-
33+
--
34+
--
3835
package my_config is
39-
-- Change these lines to setup configuration.
40-
constant MY_BOARD : string := "KC705"; -- KC705 - Xilinx Kintex 7 reference design board: XC7K325T
41-
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
36+
-- Change these lines to setup configuration.
37+
constant MY_BOARD : string := "KC705"; -- KC705 - Xilinx Kintex 7 reference design board: XC7K325T
38+
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
4239

4340
--
44-
constant MY_VERBOSE : boolean := false; -- activate detailed report statements in functions and procedures
45-
end;
46-
47-
48-
package body my_config is
49-
50-
end;
41+
constant MY_VERBOSE : boolean := FALSE; -- activate detailed report statements in functions and procedures
42+
end package;

‎src/common/my_config_KCU105.vhdl

Lines changed: 39 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,39 @@
1+
-- EMACS settings: -*- tab-width: 2; indent-tabs-mode: t -*-
2+
-- vim: tabstop=2:shiftwidth=2:noexpandtab
3+
-- kate: tab-width 2; replace-tabs off; indent-width 2;
4+
-- =============================================================================
5+
-- Authors: Patrick Lehmann
6+
--
7+
-- Package: Project specific configuration.
8+
--
9+
-- Description:
10+
-- ------------------------------------
11+
-- Configuration file for a Xilinx KCU105 board.
12+
--
13+
--
14+
-- License:
15+
-- =============================================================================
16+
-- Copyright 2017-2020 Patrick Lehmann - Boetzingen, Germany
17+
--
18+
-- Licensed under the Apache License, Version 2.0 (the "License");
19+
-- you may not use this file except in compliance with the License.
20+
-- You may obtain a copy of the License at
21+
--
22+
-- http://www.apache.org/licenses/LICENSE-2.0
23+
--
24+
-- Unless required by applicable law or agreed to in writing, software
25+
-- distributed under the License is distributed on an "AS IS" BASIS,
26+
-- WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
27+
-- See the License for the specific language governing permissions and
28+
-- limitations under the License.
29+
-- =============================================================================
30+
--
31+
--
32+
package my_config is
33+
-- Change these lines to setup configuration.
34+
constant MY_BOARD : string := "KCU105"; -- KCU105 - Xilinx Kintex UltraScale reference design board: XCKU040
35+
constant MY_DEVICE : string := "None"; -- infer from MY_BOARD
36+
37+
--
38+
constant MY_VERBOSE : boolean := FALSE; -- activate detailed report statements in functions and procedures
39+
end package;

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