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AArch64 Capstone Update / SME2 support #429
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@@ -149,14 +140,17 @@ if(SIMENG_ENABLE_TESTS) | |||
find_package(LLVM REQUIRED CONFIG NO_CMAKE_BUILDS_PATH) | |||
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# Check LLVM version | |||
if ((${LLVM_PACKAGE_VERSION} VERSION_LESS "8.0") OR (${LLVM_PACKAGE_VERSION} VERSION_GREATER_EQUAL "14.1")) | |||
message(FATAL_ERROR "LLVM version must be >= 8.0 and <= 14.0") | |||
if ((${LLVM_PACKAGE_VERSION} VERSION_LESS "8.0") OR (${LLVM_PACKAGE_VERSION} VERSION_GREATER_EQUAL "18.2")) |
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I think the if statement checks for >= 18.2, but the message says can be <= 18.2. Is 18.2 itself okay?
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Currently updating how we build LLVM in CMake so will see if this comment is still relevant then
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Was there an outcome for this?
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These checks are still in place so I will update them inline with Alex's initial comment
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Updated message
inline uint8_t getDataSize(cs_aarch64_op op) { | ||
// No V-register enum identifiers exist. Instead, depending on whether a full | ||
// or half vector is accessed, a Q or D register is used instead. | ||
// A `is_vreg` bool in `op` defines if we are using v-vecotr registers. |
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typo: 'vector'
@@ -658,8 +658,17 @@ bool ExceptionHandler::init() { | |||
if (metadata.opcode == Opcode::AArch64_MSR) { | |||
newSVCR = instruction_.getSourceOperands()[0].get<uint64_t>(); | |||
} else if (metadata.opcode == Opcode::AArch64_MSRpstatesvcrImm1) { | |||
// Enusre operand metadata is as expected |
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typo -- 'Ensure'
sourceRegisters_[sourceRegisterCount_] = csRegToRegister(op.reg); | ||
sourceRegisterCount_++; | ||
sourceOperandsPending_++; | ||
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// TODO checking of the shift type is a temporary fix to help reduce the |
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Has this todo become actionable by the capstone update?
src/lib/config/ModelConfig.cc
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@@ -370,8 +370,7 @@ void ModelConfig::setExpectations(bool isDefault) { | |||
expectations_["Core"].addChild(ExpectationNode::createExpectation<uint64_t>( |
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If we know that the maximum value for this is 2048, do we need to use unit64_t? Elsewhere we have gone for the smallest suitable datatype. Not sure if there is a technical advantage to using a smaller int type, but if there is then it might apply here as well.
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Good point / spot - changing to uint16_t
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A fair few comments but there's a lot of work done here so expected. Great job on this, a significant amount of effort done!
@@ -149,14 +140,17 @@ if(SIMENG_ENABLE_TESTS) | |||
find_package(LLVM REQUIRED CONFIG NO_CMAKE_BUILDS_PATH) | |||
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# Check LLVM version | |||
if ((${LLVM_PACKAGE_VERSION} VERSION_LESS "8.0") OR (${LLVM_PACKAGE_VERSION} VERSION_GREATER_EQUAL "14.1")) | |||
message(FATAL_ERROR "LLVM version must be >= 8.0 and <= 14.0") | |||
if ((${LLVM_PACKAGE_VERSION} VERSION_LESS "8.0") OR (${LLVM_PACKAGE_VERSION} VERSION_GREATER_EQUAL "18.2")) |
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Was there an outcome for this?
if (((Opcode::AArch64_FMOVD0 <= metadata_.opcode && | ||
metadata_.opcode <= Opcode::AArch64_FMOVS0) || | ||
(Opcode::AArch64_FMOVDXHighr <= metadata_.opcode && | ||
metadata_.opcode <= Opcode::AArch64_FMOVv8f16_ns)) && |
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Aren't the _ns
instructions moving immediates into vector registers? (and thus aren't "move to general instructions")
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For this I replaced the numbers with Opcodes (and referred to the previous Capstone version to make sure they aligned). If this is the case then we can remove the _ns
ones from this catch
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Double-checked and we should remove _ns
from this catch
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Updated catch
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Not much to add on top of the others' comments. Will approve once theirs have been resolved
docs/sphinx/user/building_simeng.rst
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@@ -41,7 +41,7 @@ With this configuration, the build files will be generated in a directory called | |||
More information about the LLVM_DIR value can be found `here <https://llvm.org/docs/CMake.html#embedding-llvm-in-your-project>`_. | |||
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.. Note:: | |||
LLVM versions greater than 14 or less than 8 are not supported. We'd recommend using LLVM 14.0.5 where possible as this has been verified by us to work correctly. | |||
LLVM versions greater than 18 or less than 8 are not supported. We'd recommend using LLVM 18.1.8 where possible as this has been verified by us to work correctly for the most recent version of SimEng. |
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Do lower versions of LLVM not support SME? If so that would be worth mentioning here (or at least somewhere in the docs)
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Versions from ~14 do support SME. Can add something to this
// Check from top of the range downwards | ||
* `aarch64_reg` enum. Updates to the Capstone library version may cause this to | ||
* break. | ||
* TODO: Add multi-register enum decoding. |
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Can this TODO be removed?
…manual DDI0487K issue K.a 20th March 2024.
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This PR updates SimEng to work with a newer release of Capstone who's AArch64 engine is based on LLVM18, hence allowing SME2 support.
The reccommended version of LLVM has also been changed to 18.1.8 and the test suite has been updated to work with this version in order to dissassemble new AArch64 instructions.
Closes Issue #349
There have been large changes to Capstone internally for AArch64, some of the main ones which effect our current development / usage include:
A writeback from a pre/post index load/store is now included as an implicit destination. Hence, in instruction_execute the updated base address register is
resuts[0]
rather thanresults[1]
(for example).Post index immediate operands are now included as part of the memory operand in
mem.disp
. Post indexing with a register however is added as an additional operand.Aliasing can be dissabled for auto-sync architectures, and has been done for AArch64. This means expected registers for the operand are now correct and allows us to remove
revertalias()
from instruction_metadata completely! The only oddity is themnemonic
andoperandStr
are still that of the alias. This means exceptions or debugging print statements may be confusing. To indicate aliases better, anisAlias
bool has been added to the metadata and exception print out.Get automatic LLVM download and install working for version 18.1.8
Add AArch64 multi-vector operand enum decoding logic to instruction_decode