Digital Design Template

Preprocess

Download the tsmc 65nm standard cell library from here and unzip it to lib/.

The source files are in src/ and the testbenches are in test/. Change the run_1_behavior/1_behavior_filelist according to your needs. Then run:

cd run_1_behavior
bash run_1_behavior.sh
./simv

The .vcd file will be generated in vcd/.

Change the src_files in run.tcl and the clock/reset definition in scripts/cons.tcl. Then run:

bash run_2_dc.sh

The netlist will be generated in netlist/, and the reports will be generated in report/.

Change the run_3_post/3_post_filelist according to your needs. Then run:

cd run_3_post
bash run_3_post.sh
./simv

The .vcd file will be generated in vcd/. Note the .vcd file is different from the one generated in behavioral simulation.

Name		Name	Last commit message	Last commit date
Latest commit History 17 Commits
netlist		netlist
run_1_behavior		run_1_behavior
run_3_post		run_3_post
scripts		scripts
sdc		sdc
src		src
test		test
.gitignore		.gitignore
.synopsys_dc.setup		.synopsys_dc.setup
README.md		README.md
run.tcl		run.tcl
run_2_dc.sh		run_2_dc.sh