FPGA-Stopwatch

Impement a simple stopwatch on an FPGA. There is an added goal of making as many modules paramterized as possible and sticking to structural code as much as possible.

Instructions

Set up Alchitry Labs with Vivado

Open src/hdl/au_top.v as top file

Import src/constrs/au.xdc and src/constrs/io.xdc as constraints files.