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* GPIO_in & Logic_in: Internal init fix to be in release state (no sp…
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…urious callback triggered after init)
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SMFSW committed Apr 12, 2023
1 parent c65002a commit f16c47d
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Showing 2 changed files with 4 additions and 7 deletions.
10 changes: 3 additions & 7 deletions Logic_in.c
Original file line number Diff line number Diff line change
Expand Up @@ -12,20 +12,16 @@ void NONNULLX__(1) Logic_in_init( Logic_in * const in, GPIO_PinState (*getter)(c
uint32_t * const addr, const uint32_t pos, const GPIO_PinState polarity, const uint16_t filter,
void (*onSet)(const Logic_in * const), void (*onReset)(const Logic_in * const), const bool repeat)
{
/* Check the parameters */
//assert_param(pos < 32); // Would raise an assert error in case of GPIO pin

in->cfg.get = getter;
in->cfg.LOGx = addr;
in->cfg.LOG_Pos = pos;
in->cfg.polarity = polarity;
in->cfg.polarity = polarity & 1U; // Ensuring polarity is boolean value
in->cfg.filt = filter;
in->cfg.onSet = onSet;
in->cfg.onReset = onReset;
in->cfg.repeat = repeat;

in->in = polarity;
in->mem = polarity;
in->in = false;
in->mem = false;
in->edge = NoEdge;
in->hIn = 0;
}
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1 change: 1 addition & 0 deletions ReleaseNotes.md
Original file line number Diff line number Diff line change
Expand Up @@ -22,6 +22,7 @@ SOFTWARE.

## v1.5

* GPIO_in & Logic_in: Internal init fix to be in release state (no spurious callback triggered after init)
* TIM_ex: fix possible div by 0
* ADC_ex: Fixes for compensation when calibrated values differ from VDD_VALUE
* ADC_ex: Added customizable pre-processing symbols to allow better ADC configuration when needed (ADC_RESOLUTION, Def_VAlim, Def_VCal, Def_VBatFactor)
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