[bsp][ch32v203] add CH32V203C8T6-EVT-R0 support - #11827
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The EVT-R0 board is a QingKe V4B D6 part: 64KB zero-wait Flash and 20KB SRAM. The CH32V20x SDK package ships D8W startup and exits on D6, so this BSP adds a D6 vector table and keeps that package building. Default config enables GPIO and UART1 so the image fits with room to spare. PWM, ADC, RTC, the independent watchdog, and USB device were checked on the board as separate menuconfig sets. USB CDC on the Type-C port answered help and version. The shared USBFS device driver keeps endpoint buffers in SRAM and writes the device address after the status IN. CH32V2 watchdog code includes the V2 header.
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📌 Code Review Assignment🏷️ Tag: bsp_wchReviewers: @Maihuanyi Changed Files (Click to expand)
🏷️ Tag: workflowReviewers: @Rbb666 @kurisaW @supperthomas Changed Files (Click to expand)
📊 Current Review Status (Last Updated: 2026-09-24 15:08 CST)
📝 Review Instructions
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Copilot review overview
🟡 Changes recommended
The Kconfig exposes unsupported peripherals and invalid pins, while the watchdog command accepts unsafe timeout input.
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Review effort: Balanced
Findings: 4
Open (9)
Remove unsupported DAC option from D6 BSP · New Remove unsupported SPI3 and nested flash options · New Remove unsupported CAN2 option from D6 BSP · New Remove unsupported TIM5–TIM10 configuration blocks · New Validate watchdog timeout input before configuration · New Fix software SPI2 defaults to valid GPIO pins · New Fix documentation reference to missing package.json · New Correct diagnostic grammar from Cannot found to Cannot find · New Correct internal reference channel label to Vref · New
What changed in this PR
Adds CH32V203C8T6-EVT-R0 BSP support, including startup, memory layout, drivers, documentation, and CI integration. / 新增 CH32V203C8T6-EVT-R0 BSP,包括启动、内存布局、驱动、文档和 CI 支持。
Changes:
- Adds the complete CH32V203C8T6 board configuration and startup path. / 添加完整的板级配置与启动流程。
- Updates shared USB-device and watchdog drivers. / 更新共享 USB 设备和看门狗驱动。
- Registers the BSP in documentation and CI matrices. / 将 BSP 加入文档和 CI 矩阵。
| File | Description |
|---|---|
tools/ci/toolchain_bsp.yml |
Adds BSP toolchain mapping. |
tools/ci/bsp_detail.yml |
Adds BSP validation metadata. |
bsp/wch/risc-v/libraries/ch32_drivers/drv_usbd.c |
Revises USBFS endpoint and DMA handling. |
bsp/wch/risc-v/libraries/ch32_drivers/drv_iwdt.c |
Selects family-specific watchdog headers. |
bsp/wch/risc-v/ch32v203c-evt-r0/SConstruct |
Defines BSP build and SDK workaround. |
bsp/wch/risc-v/ch32v203c-evt-r0/SConscript |
Collects BSP build groups. |
bsp/wch/risc-v/ch32v203c-evt-r0/rtconfig.py |
Configures the RISC-V toolchain and linker. |
bsp/wch/risc-v/ch32v203c-evt-r0/rtconfig.h |
Adds generated default configuration. |
bsp/wch/risc-v/ch32v203c-evt-r0/README.md |
Documents setup, hardware, and testing. |
bsp/wch/risc-v/ch32v203c-evt-r0/Kconfig |
Connects BSP and package configuration. |
bsp/wch/risc-v/ch32v203c-evt-r0/board/startup_ch32v20x_D6.S |
Adds D6 startup and vector table. |
bsp/wch/risc-v/ch32v203c-evt-r0/board/software_irq.c |
Implements software-interrupt support. |
bsp/wch/risc-v/ch32v203c-evt-r0/board/SConscript |
Builds board sources. |
bsp/wch/risc-v/ch32v203c-evt-r0/board/linker_scripts/link.lds |
Defines 64-KB Flash and 20-KB RAM layout. |
bsp/wch/risc-v/ch32v203c-evt-r0/board/Kconfig |
Exposes board peripheral options. |
bsp/wch/risc-v/ch32v203c-evt-r0/board/board.h |
Defines board memory and USB mappings. |
bsp/wch/risc-v/ch32v203c-evt-r0/board/board.c |
Initializes board, USB, ADC, and SysTick. |
bsp/wch/risc-v/ch32v203c-evt-r0/applications/wdt_msh.c |
Adds watchdog shell commands. |
bsp/wch/risc-v/ch32v203c-evt-r0/applications/SConscript |
Builds application sources. |
bsp/wch/risc-v/ch32v203c-evt-r0/applications/main.c |
Adds the BSP application entry point. |
bsp/wch/risc-v/ch32v203c-evt-r0/.config |
Defines the default BSP configuration. |
bsp/wch/risc-v/ch32v203c-evt-r0/.ci/attachconfig/ci.attachconfig.yml |
Adds GPIO and UART CI configurations. |
bsp/README.md |
Lists supported board peripherals. |
.github/workflows/manual_trigger_scons_except_STM32_all.yml |
Adds the BSP to manual CI. |
.github/ALL_BSP_COMPILE.json |
Adds the BSP to compilation coverage. |
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| menuconfig BSP_USING_DAC | ||
| bool "Enable DAC" | ||
| select RT_USING_DAC | ||
| default n | ||
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| if BSP_USING_DAC | ||
| config BSP_USING_DAC_CHANNEL1 | ||
| bool "Enable DAC CHANNEL1" | ||
| default n | ||
| config BSP_USING_DAC_CHANNEL2 | ||
| bool "Enable DAC CHANNEL2" | ||
| default n | ||
| endif |
| config BSP_USING_SPI3 | ||
| bool "Enable SPI3" | ||
| default n | ||
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| if BSP_USING_SPI3 | ||
| config BSP_USING_SPI_FLASH | ||
| bool "Enable SPI Flash" | ||
| default n | ||
| endif |
| config BSP_USING_CAN2 | ||
| bool "Using CAN2" | ||
| default n |
| config BSP_USING_TIM5 | ||
| bool "Using TIM5" | ||
| default n |
| rt_kprintf("wdt start <seconds>\n"); | ||
| return -RT_ERROR; | ||
| } | ||
| timeout = atoi(argv[2]); |
| menuconfig BSP_USING_SOFT_SPI2 | ||
| bool "Enable software SPI2 Bus (swspi2)" | ||
| default n | ||
| select RT_USING_SOFT_SPI | ||
| select RT_USING_SOFT_SPI2 | ||
| if BSP_USING_SOFT_SPI2 | ||
| config RT_SOFT_SPI2_SCK_PIN | ||
| int "swspi2 SCK pin number" | ||
| default 64 | ||
| config RT_SOFT_SPI2_MISO_PIN | ||
| int "swspi2 MISO pin number" | ||
| default 66 | ||
| config RT_SOFT_SPI2_MOSI_PIN | ||
| int "swspi2 MOSI pin number" | ||
| default 65 | ||
| endif |
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| 1. 安装 [WCH RISC-V GCC](https://github.com/NanjingQinheng/sdk-toolchain-RISC-V-GCC-WCH) 与 [Env](https://github.com/RT-Thread/env-windows/releases) | ||
| 2. 进入本目录,设置 `RTT_EXEC_PATH` 为工具链 `bin` | ||
| 3. `pkgs --update` 拉取 `CH32V20x_SDK`(或按 `package.json` clone `kaidegit/CH32V20x-SDK-for-RTT` 到 `packages/`) |
| try: | ||
| from building import * | ||
| except: | ||
| print('Cannot found RT-Thread root directory, please check RTT_ROOT') |
| config ADC_CHANNEL_17 | ||
| bool "Enable ADC CHANNEL 17 (inside Verf)" | ||
| default n |
CH32V203C8 is D6, so the menu no longer offers DAC, SPI3, CAN2, or TIM5-TIM10. Software SPI2 was pointing at GPIOE pins this package does not have. The watchdog command now rejects a timeout that is not a whole number of seconds inside the counter range.
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| ## 1 开发板简介 | ||
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| CH32V203C8T6-EVT-R0 是 WCH 沁恒的 RISC-V 评估板。芯片是 QingKe **V4B(CH32V20x_D6)**,手册零等待 Flash **64KB**、SRAM **20KB**。LinkUtility 读到的 224KB 是 V203 系列总 CodeFlash,**不要**写进链接脚本。 |
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麻烦参考一下其他BSP的readme,这整个文章ai味道太重了
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行,我一会改改
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ok啦,你看看~
Match the CH32V307 Chinese readme outline and drop the measured peripheral logs.
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这部分测试代码推荐以这种方式加入,对接到utest中,参考 bsp/k230/drivers/utest
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好的好的,我看看。
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嘶,有点复杂,可能得明天才能做完了,今天寝室要断电了
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刚刚发得太草率了,我上板测一遍再说
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测好力,我测完才发的
Replace the msh start/feed command with a utest case. The case stays out of the default image unless IWDT and the test switch are both on. This independent watchdog cannot be stopped after start, so the no-feed half is expected to reset. The link script keeps the utest case table. Signed-off-by: seteiro <276597748+cms19859230182-lang@users.noreply.github.com>
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拉取/合并请求描述:(PR description)
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为什么提交这份PR (why to submit this PR)
CH32V203C8T6-EVT-R0 has no BSP in the mainline tree. The part is QingKe V4B, CH32V20x_D6, with 64KB zero-wait Flash and 20KB SRAM. The published CH32V20x SDK package only ships D8W startup and calls Exit() for D6, so a stock package build cannot produce a firmware for this board.
你的解决方案是什么 (what is your solution)
Add
bsp/wch/risc-v/ch32v203c-evt-r0. It uses the in-treech32_drivers, a D6 vector table whose software-interrupt symbol isSW_handler, and a 64KB/20KB linker script.SConstructpatches onlypackages/CH32V20x-SDK-for-RTT/SConscript, and only while that file still Exit()s on D6, so D8W packages are left alone.The default image enables GPIO and UART1 (USART1 on PA9/PA10). PWM, ADC, RTC, the independent watchdog, and USB device stay in menuconfig. 64KB cannot hold USB together with those four peripherals.
Two shared driver fixes are included because this board needs them:
drv_usbd.c: USBFS DMA keeps a 16-bit SRAM offset, endpoint buffers must live in SRAM, and SET_ADDRESS is written after the status IN. Full-speed packet size is 64 bytes.drv_iwdt.c: CH32V2 includesch32v20x_iwdg.h. CH32V3 still includesch32v30x_iwdg.h.Verified on CH32V203C8T6-EVT-R0 with WCH RISC-V GCC 8.2.0:
mshon USART1.0x5C9; channel 16 settled at0x6C4. PA0 read0xFFFon 3.3V and0x4/0x5on GND.0FFEPID0001. With PWM/ADC/RTC/watchdog off, the host COM port answeredhelpandversion(RT-Thread 5.3.1). That image was 64780 bytes (98.85%).Notes: https://notes.seteiro.xyz/posts/ch32v203-msh/
请提供验证的bsp和config (provide the config and bsp)
BSP:
bsp/wch/risc-v/ch32v203c-evt-r0.config: default is
CONFIG_BSP_USING_GPIO,CONFIG_BSP_USING_UART,CONFIG_BSP_USING_UART1. PWM, ADC, RTC, IWDT, and USBD are off in the default image. EnableCONFIG_BSP_USING_USBDonly with those four off, and setCONFIG_RT_USBD_THREAD_STACK_SZ=1024.action:
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当前拉取/合并请求的状态 Intent for your PR
必须选择一项 Choose one (Mandatory):
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我在这个拉取/合并请求中已经考虑了 As part of this pull request, I've considered the following:
#if 0代码,不包含已经被注释了的代码 All redundant code is removed and cleaned up