gpu: add 8 gfx indirect rings

RPCSX · Oct 22, 2024 · 6a2507c · 6a2507c
1 parent 2432a5c
commit 6a2507c
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Showing 3 changed files with 27 additions and 2 deletions.
diff --git a/rpcsx/gpu/Pipe.cpp b/rpcsx/gpu/Pipe.cpp
@@ -127,6 +127,8 @@ bool ComputePipe::processRing(Ring &ring) {
       ring.rptr = ring.base + *ring.rptrReportLocation;
     }
 
+    auto origRptr = ring.rptr;
+
     while (ring.rptr != ring.wptr) {
       if (ring.rptr >= ring.base + ring.size) {
         ring.rptr = ring.base;
@@ -167,7 +169,7 @@ bool ComputePipe::processRing(Ring &ring) {
       rx::die("unexpected pm4 packet type %u", type);
     }
 
-    if (ring.rptrReportLocation != nullptr) {
+    if (origRptr != ring.rptr && ring.rptrReportLocation != nullptr) {
       *ring.rptrReportLocation = ring.rptr - ring.base;
     }
 
@@ -619,10 +621,31 @@ bool GraphicsPipe::processAllRings() {
 
     if (ring.rptr != ring.wptr) {
       allProcessed = false;
+
+      for (auto &delayedRing : delayedRings) {
+        if (delayedRing.rptr != delayedRing.wptr) {
+          continue;
+        }
+
+        delayedRing = ring;
+        ring.rptr = ring.wptr;
+        break;
+      }
+
       break;
     }
   }
 
+  if (allProcessed) {
+    for (auto &ring : delayedRings) {
+      if (ring.rptr == ring.wptr) {
+        continue;
+      }
+
+      processRing(ring);
+    }
+  }
+
   return allProcessed;
 }
 

diff --git a/rpcsx/gpu/Pipe.hpp b/rpcsx/gpu/Pipe.hpp
@@ -103,6 +103,8 @@ struct GraphicsPipe {
   Registers::Context context;
   Registers::UConfig uConfig;
 
+  Ring delayedRings[8];
+
   Ring deQueues[3];
   Ring ceQueue;
 

diff --git a/rpcsx/iodev/gc.cpp b/rpcsx/iodev/gc.cpp
@@ -147,7 +147,7 @@ static orbis::ErrorCode gc_ioctl(orbis::File *file, std::uint64_t request,
 
   case 0xc0048116: { // submit done?
     if (auto gpu = amdgpu::DeviceCtl{orbis::g_context.gpuDevice}) {
-      gpu.waitForIdle();
+      // gpu.waitForIdle();
     } else {
       return orbis::ErrorCode::BUSY;
     }