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Merge pull request #2190 from AleoHQ/clarify_wrapped_documentation
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[NCC VBV] Clarify wrapped documentation
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howardwu authored Nov 24, 2023
2 parents 12cc5c6 + f3add02 commit 8edd368
Showing 1 changed file with 2 additions and 2 deletions.
4 changes: 2 additions & 2 deletions synthesizer/program/src/logic/instruction/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -181,11 +181,11 @@ pub enum Instruction<N: Network> {
RemWrapped(RemWrapped<N>),
/// Shifts `first` left by `second` bits, storing the outcome in `destination`.
Shl(Shl<N>),
/// Shifts `first` left by `second` bits, continuing past the boundary of the type, storing the outcome in `destination`.
/// Shifts `first` left by `second` bits, wrapping around at the boundary of the type, storing the outcome in `destination`.
ShlWrapped(ShlWrapped<N>),
/// Shifts `first` right by `second` bits, storing the outcome in `destination`.
Shr(Shr<N>),
/// Shifts `first` right by `second` bits, continuing past the boundary of the type, storing the outcome in `destination`.
/// Shifts `first` right by `second` bits, wrapping around at the boundary of the type, storing the outcome in `destination`.
ShrWrapped(ShrWrapped<N>),
/// Computes whether `signature` is valid for the given `address` and `message`.
SignVerify(SignVerify<N>),
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