Pinned Loading

1. VSDMemSOC VSDMemSOC Public

   VSDMemSOC Implementation flow:: RTL2GDSII

   Verilog 1

2. tt07_cdc_fifo tt07_cdc_fifo Public

   Tapeout of "Clock Domain Crossing FIFO" module using Tinytapeout(tt07) shuttle

   SystemVerilog 2

3. TCL_Workshop TCL_Workshop Public

   5-Day TCL begginer to advanced workshop by VSD

   Verilog

4. RISC-V_HDP RISC-V_HDP Public

   Design of a Customizable RISC-V SoC for Clapswitch Application

   Verilog 1