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add veye
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raphaelscholle committed May 20, 2024
1 parent d1816e9 commit 9ae814e
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1 change: 1 addition & 0 deletions arch/arm64/boot/dts/rockchip/overlays/Makefile
Original file line number Diff line number Diff line change
Expand Up @@ -123,6 +123,7 @@ dtb-$(CONFIG_CLK_RK3568) += \
radxa-cm3-rpi-cm4-io-disable-emc2301.dtbo \
radxa-cm3-rpi-cm4-arducam-imx708-cam0.dtbo \
radxa-cm3-rpi-cm4-arducam-imx708-cam1.dtbo \
radxa-cm3-rpi-cm4-veye-m2m.dtbo \
radxa-cm3s-io-csi0-okdo-5mp-camera.dtbo \
radxa-cm3s-io-csi0-rpi-camera-v1p3.dtbo \
radxa-cm3s-io-csi0-rpi-camera-v2.dtbo \
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156 changes: 156 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/radxa-cm3-rpi-cm4-rpi-cam-v1.dts
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/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>

/ {
metadata {
title = "Enable Raspberry Pi Camera v1.3 on CM3 RPI-IO v1.34+ CAM0";
compatible = "radxa,cm3-rpi-cm4-io";
category = "camera";
exclusive = "csi2_dphy2";
description = "Enable Raspberry Pi Camera v1.3 on CM3 RPI-IO v1.34+ CAM0.";
};

fragment@0 {
target-path = "/";

__overlay__ {
ext_cam_ov5647_clk_0: external-camera-ov5647-clock-0 {
status = "okay";
compatible = "fixed-clock";
clock-frequency = <25000000>;
clock-output-names = "ext_cam_ov5647_clk_0";
#clock-cells = <0>;
};
};
};

fragment@1 {
target = <&i2c2>;

__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2m1_xfer>;
#address-cells = <1>;
#size-cells = <0>;

ov5647: ov5647@36 {
status = "okay";
compatible = "ovti,ov5647";
reg = <0x36>;
clocks = <&ext_cam_ov5647_clk_0>;
clock-names = "ext_cam_ov5647_clk_0";
pwdn-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "rpi-camera-v1p3";
rockchip,camera-module-lens-name = "default";

port {
ov5647_0_out: endpoint {
remote-endpoint = <&csi2dphy0_uCAM0>;
data-lanes = <1 2>;
};
};
};
};
};

fragment@2 {
target = <&csi2_dphy_hw>;

__overlay__ {
status = "okay";
};
};

fragment@3 {
target = <&csi2_dphy2>;

__overlay__ {
status = "okay";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;

csi2dphy0_ucam0: endpoint@1 {
reg = <1>;
remote-endpoint = <&ov5647_0_out>;
data-lanes = <1 2>;
};
};

port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;

csi2dphy0_out: endpoint@1 {
reg = <1>;
remote-endpoint = <&isp0_in>;
};
};
};
};
};

fragment@4 {
target = <&rkisp_vir0>;

__overlay__ {
status = "okay";

port {
#address-cells = <1>;
#size-cells = <0>;

isp0_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&csi2dphy0_out>;
};
};
};
};

fragment@5 {
target = <&rkisp>;

__overlay__ {
status = "okay";
};
};

fragment@6 {
target = <&rkisp_mmu>;

__overlay__ {
status = "okay";
};
};

fragment@7 {
target = <&rkcif_mmu>;

__overlay__ {
status = "okay";
};
};

fragment@8 {
target = <&rkcif>;

__overlay__ {
status = "okay";
};
};

};
159 changes: 159 additions & 0 deletions arch/arm64/boot/dts/rockchip/overlays/radxa-cm3-rpi-cm4-veye-m2m.dts
Original file line number Diff line number Diff line change
@@ -0,0 +1,159 @@
/dts-v1/;
/plugin/;

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/pinctrl/rockchip.h>

/ {
metadata {
title = "Enable Veye Camera on CM3";
compatible = "radxa,cm3-rpi-cm4-io";
category = "camera";
exclusive = "csi2_dphy2";
description = "Enable Veye Camera on CM3";
};

fragment@0 {
target-path = "/";

__overlay__ {
clk_cam_24m: external-camera-clock-24m {
status = "okay";
compatible = "fixed-clock";
clock-frequency = <4000000>;
clock-output-names = "clk_cam_24m";
#clock-cells = <0>;
};
};
};

fragment@1 {
target = <&i2c2>;

__overlay__ {
status = "okay";
pinctrl-names = "default";
pinctrl-0 = <&i2c2m1_xfer>;
#address-cells = <1>;
#size-cells = <0>;

veyecam2m: veyecam2m@3b {
status = "okay";
compatible = "veye,veyecam2m";
reg = <0x3b>;
clocks = <&cru CLK_CIF_OUT>;
clock-names = "xvclk";
pwdn-gpios = <&gpio4 RK_PC1 GPIO_ACTIVE_HIGH>;
power-domains = <&power RK3568_PD_VI>;
pinctrl-names = "default";
pinctrl-0 = <&cif_clk>;
rockchip,camera-module-index = <0>;
rockchip,camera-module-facing = "back";
rockchip,camera-module-name = "beye";
rockchip,camera-module-lens-name = "default";

port {
veyecam2m_out: endpoint {
remote-endpoint = <&mipi_in_ucam3>;
data-lanes = <1 2>;
};
};
};
};
};

fragment@2 {
target = <&csi2_dphy_hw>;

__overlay__ {
status = "okay";
};
};

fragment@3 {
target = <&csi2_dphy2>;

__overlay__ {
status = "okay";

ports {
#address-cells = <1>;
#size-cells = <0>;

port@0 {
reg = <0>;
#address-cells = <1>;
#size-cells = <0>;

mipi_in_ucam3: endpoint@4 {
reg = <4>;
remote-endpoint = <&veyecam2m_out>;
data-lanes = <1 2>;
};
};

port@1 {
reg = <1>;
#address-cells = <1>;
#size-cells = <0>;

csi2dphy0_out: endpoint@0 {
reg = <0>;
remote-endpoint = <&isp0_in>;
};
};
};
};
};

fragment@4 {
target = <&rkisp_vir0>;

__overlay__ {
status = "okay";

port {
#address-cells = <1>;
#size-cells = <0>;

isp0_in: endpoint@0 {
reg = <0>;
remote-endpoint = <&csi2dphy0_out>;
};
};
};
};

fragment@5 {
target = <&rkisp>;

__overlay__ {
status = "okay";
};
};

fragment@6 {
target = <&rkisp_mmu>;

__overlay__ {
status = "okay";
};
};

fragment@7 {
target = <&rkcif_mmu>;

__overlay__ {
status = "okay";
};
};

fragment@8 {
target = <&rkcif>;

__overlay__ {
status = "okay";
};
};

};

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