Prime Number Detection

This project contains VHDL implementation of Prime Number Detection of 8 bit unsigned numbers. Two different approaches were tried:

1. Trial Division
2. Miller Rabin Test

Components

1. PND_Trial_Division
2. MRT

Future Improvements

• Decreasing the latency of the final result for MRT
• Replace the for loops inside PND Trial Division with a clock based implementation
• Developing MRT which supports larger bit width for inputs

Contributing

Fell free to submit a pull request :)

License

This project is licensed under the MIT License - see the LICENSE.md file for details