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[mlir-tensorrt] Add support for non-DPS calling convention #258
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if (result.getType().isa<TensorType>() != allTensors) { | ||
return emitOpError("all results must be of the same type (all tensors " | ||
"or all memrefs)"); | ||
} |
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We should also be verifying the layout (stride + offset) information on memref results, e.g.
trtrt.alloc_enqueue .... -> memref<?x?x?xf32>
implies the identity layout (canonical row major strides).
trtrt.alloc_enqueue .... -> memref<?x?x?xf32, strided<[?, ?, ?, ?], offset: ?>>
indicates that the strides are unknown.
Not being able to know anything about the strides is very worst-case since it disables many possible optimizations.
We need this information from TensorRT -- what layouts of results are possible/allowed? Can we enforce that canonical strides will always be returned from TensorRT using the output allocator? If we can, then the verifier should enforce that canonical layouts are used.
Currently for trtrt.enqueue
we are effectively enforcing canonical strides for input and output buffers.
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As I mentioned in the other thread, MLIR-TRT does not use the nvinfer1::setAllowedFormat
API, which allows formats other than nvinfer1::TensorFormat::kLINEAR. So, for all practical purposes, stride here is canonical.
I will add a check in the verifier for canonical strides. Let me know if you meant this as I might have misunderstood you.
Also, How can I generate this assembly format: memref<?x?x?xf32, strided<[?, ?, ?, ?], offset: ?>>
?
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This commit introduces support for a non-Destination-Passing Style (non-DPS) calling convention in mlir-tensorrt, while maintaining the existing DPS-style interface.
The changes aim to allow users to compile and execute a mlir-tensorrt executable without allocating output memrefs in advance. Removing the output memref allocation restriction alleviates users from computing output shapes in advance and allocating output memrefs. This is critical since it is part of the performance-critical execution loop.
Deferred output allocation has an added advantage as we no longer need to allocate shape upper bound output buffers and copy the exact output buffer from TensorRT results into mlir-tensorrt output buffers.
This approach also allows us to support data-dependent shapes since the outputs are not required to be allocated before execution.
The non-DPS style calling convention implementation leverages the
nvinfer1::IOutputAllocator
interface for deferred output allocation. Interface functions such asreallocateOutputAsync
andnotifyShapes
store the allocated output buffer address and its shape.User call sites with existing DPS-style calling convention:
Now, we can do the following with non-DPS style convention:
Key changes include:
Plan
dialect to implement non-DPS calling convention:PlanAllocTensorsPass
andCreateClosedRegionsPass
to handle non-DPS conventionCallAllocOp
andCallOp
respectively.ConvertTensorRTToTensorRTRuntime
to support both calling conventionsEnqueueAllocOp
for non-DPS style executionEnqueueAllocOp
to executorCallOp
.OutputAllocator
andCustomTensorRTOuputAllocator
classes with proper lifetime management usingOutputAllocatorTracker
.executeFunctionWithLuaBackend
to support both DPS and non-DPS styles