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This project showcases the design and simulation of a Digital Clock in Logisim Evolution, using counters, multiplexers, and clock signals to teach binary time-keeping and digital logic.πŸš€

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πŸš€ My Digital Clock in Logisim

πŸ“– Introduction

This repository contains the design and simulation of a Digital Clock using Logisim Evolution, a digital circuit simulation tool. The project demonstrates how digital components, such as counters, multiplexers, and clock signals, can be used to implement a functioning digital clock. The clock displays the time in hours, minutes, and seconds using a binary counter approach.

The project also includes various components, files, and resources necessary to view and understand how the circuit operates. It is ideal for students and hobbyists looking to explore digital logic circuits and learn about time-keeping in binary format.

Check my post in LinkedIn to see the simulation of my clock: Digital Clock Simulation

πŸ“‚ File Structure

/My_Digital_Clock_in_Logisim
│── Screenshorts/                # Screenshots of the digital clock simulation
│── mehedi_2107086.circ          # Logisim file for the original clock design
│── new_Mehedi_2107086.circ      # Logisim file for the updated clock design
│── README.md                    # Project overview and instructions

πŸ›  Included Files

1️⃣ mehedi_2107086.circ

This is the original Logisim circuit file for the digital clock design. The circuit includes counters for seconds, minutes, and hours, as well as necessary components to control the flow of the clock.

Key Features:

  • Counter logic for tracking time in seconds, minutes, and hours.
  • Multiplexers to select the appropriate value for display.
  • Uses clock signals to update the values at regular intervals.

2️⃣ new_Mehedi_2107086.circ

This is an updated version of the original mehedi_2107086.circ file, with improvements and enhancements. It may include optimizations in the circuit, additional features, or fixes that improve its performance or simulation accuracy.

Key Features:

  • Improved counter precision to handle overflows.
  • More efficient logic for time increments.
  • Better simulation performance with reduced complexity.

3️⃣ Screenshorts

This folder contains screenshots of the Logisim project, showing the digital clock circuit design and simulation results. These images help to visualize how the circuit is constructed and how the simulation behaves.

Key Features:

  • Visual representation of the digital clock design.
  • Simulation outputs that demonstrate how the clock increments time.
  • Useful for understanding the flow of the circuit and how components interact.

4️⃣ README.md

This file contains an overview of the project, the functionality of the digital clock, and instructions on how to open and run the circuit in **Logisim Evolution**. It also provides guidance on troubleshooting and future improvements.

πŸš€ How to Run the Digital Clock Circuit

πŸ”Ή Steps to Open in Logisim Evolution

1. Download and Install Logisim Evolution:
If you don’t already have Logisim Evolution installed, download it from the official website:
Logisim Evolution

2. Open Logisim Evolution:
Launch the Logisim Evolution software after installation.

3. Load the Circuit Files:
Open the repository directory where you saved the files. Select the mehedi_2107086.circ or new_Mehedi_2107086.circ files to load them into Logisim Evolution.

4. Start the Simulation:
Click on Simulate β†’ Tick Once or press the F5 key to run the simulation. The clock should start running and will display the time on the screen.

5. Modify Inputs and Observe Outputs:
You can modify the simulation by adding switches for user input or using LEDs to display output. The digital clock will update based on the clock pulses.


πŸ” Debugging & Common Issues

πŸ”Ή Floating Inputs (Red Wires)

Ensure that all inputs, especially for logic gates, have a defined value. In Logisim, floating inputs are shown as red wires, indicating undefined or missing inputs.
Solution: Use constants or input switches to provide defined values for inputs.

πŸ”Ή Incorrect Outputs

If the output doesn’t match the expected result, there may be an issue with the logic or connections in the circuit.
Solution: Double-check the wiring, ensure proper clock signals are applied, and verify the truth tables for combinational logic.

πŸ”Ή Clock Not Updating

Sometimes, the clock signal may not be properly connected, or there may be an issue with how the clock is driving the counters.
Solution: Make sure that the clock signal is connected to the appropriate components and that the circuit is receiving the correct pulses.


πŸ›  Future Improvements

  • βœ… Extend the counter circuits to support higher bit-widths for larger time representations.
  • βœ… Implement an alarm feature to trigger at a specific time.
  • βœ… Improve cache management for the digital clock design, such as adding a backup for time in case of power failure.

πŸ“œ License

This project is open-source. You are free to use, modify, and contribute to the project under the terms of the MIT License. Feel free to create forks, submit pull requests, or report issues.


πŸ’‘ Conclusion

This repository serves as an example of digital logic design using Logisim Evolution. The digital clock demonstrates basic concepts such as counters, multiplexers, and clock signal management, providing a simple yet effective way to learn about binary time-keeping and digital electronics. This project is helpful for anyone learning about digital circuits, computer architecture, or hobbyists interested in experimenting with Logisim Evolution.

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This project showcases the design and simulation of a Digital Clock in Logisim Evolution, using counters, multiplexers, and clock signals to teach binary time-keeping and digital logic.πŸš€

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