Implement hardware-accelerated cycle-exact IEC bus controller device

[gardners]

Is your feature request related to a problem? Please describe.

#341 and #283 both occur because managing IEC communications on a CPU that changes frequency is a bit of a pain in the backside. It would be nice to have a good solution to this, so that all IEC peripherals worked -- including in fast/JiffyDOS/DolphinDOS mode etc.

Describe the solution you'd like
A hardware accelerated IEC serial controller that looks after all the black magic and exact timings required, and presents a hardware interface with commands that map to the KERNAL jumptable for IEC communicatoins.

Describe alternatives you've considered

1. Acquire time-machine, go back to when 6522 was being developed, and point out the shift-register bug, so that the VIC-20 would have used fast serial from the start. This would make a lot of things easier, however, timemachines are never in the depot when you go looking for one, which also presents some interesting logical corrundrums, similar to the paradox of why space isn't as bright as the surface of a sun, given that all sight lines point towards stars.
2. As above, but this time tell them to get over the lack of shift-register, and just use a JiffyDOS-like protocol from the start in the VIC-20.
3. As above, but start a company who makes cheaper IEEE-488 cables, so that the VIC-20 could have just stayed with the parallel bus. Then we could all still be using SFD1001s etc, too.
4. Spend a lot of time and effort in the ROM to make it all work. Volunteers welcome.

Additional context
Also has the benefit of making it much easier to access IEC devices without the KERNAL, as the JSRs to the jumptable will instead basically become a set of similar POKEs.