Add memory protection support to RISC-V port

[vishwamartur]

Related to #908

Add memory protection support to the RISC-V port.

• Memory Protection Configurations and Settings

  • Add memory protection-related configurations and settings in portable/GCC/RISC-V/portmacro.h and portable/IAR/RISC-V/portmacro.h.
  • Define macros for enabling and disabling memory protection in both files.

• Critical Section Handling

  • Update the portENTER_CRITICAL and portEXIT_CRITICAL macros in portable/GCC/RISC-V/portmacro.h and portable/IAR/RISC-V/portmacro.h to handle memory protection.

• Chip-Specific Extensions

  • Add memory protection-related definitions and macros in portable/GCC/RISC-V/chip_specific_extensions/RISCV_MTIME_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h and portable/IAR/RISC-V/chip_specific_extensions/RV32I_CLINT_no_extensions/freertos_risc_v_chip_specific_extensions.h.
  • Define macros for saving and restoring memory protection context in both files.

• Port Functions

  • Add functions for enabling and disabling memory protection in portable/GCC/RISC-V/port.c and portable/IAR/RISC-V/port.c.

Working on still: portASM.s planning to implement ASAP

[sonarqubecloud]

Quality Gate passed

Issues
0 New issues
0 Accepted issues

Measures
0 Security Hotspots
0.0% Coverage on New Code
0.0% Duplication on New Code

See analysis details on SonarCloud

[ActoryOu]

Hi @vishwamartur,
We greatly appreciate your submission. Would you kindly share the verification results for this change? We're interested in learning more about the specifics of your contribution.

Thank you for your time and effort.

[aggarg]

I have changed this PR to draft. Please mark it ready when you are done with the changes. Please also include the details about how are you testing these changes.

[vishwamartur]

Hi @ActoryOu and @aggarg,

Thank you for the feedback and support! I haven’t conducted testing yet, as I don’t currently have access to a compatible platform for this setup. If there are any suggestions for a testing approach or available emulators that support memory protection configurations for RISC-V, please let me know, and I’ll be glad to proceed accordingly.

Thanks again for your guidance!

[aggarg]

For RISC-V, you can try using this QEmu demo - https://github.com/FreeRTOS/FreeRTOS/tree/main/FreeRTOS/Demo/RISC-V-Qemu-virt_GCC. If you do not have a platform to test, how are you developing these changes?

[aggarg]

@vishwamartur Please share the testing details. Would you also share the details about how you developed these changes.

[aggarg]

As I have not heard back, I am closing this PR. Please feel free to create a new one when you are ready with the changes.