FOME-Tech · mck1117 · Mar 12, 2024 · Mar 12, 2024 · Mar 12, 2024 · Mar 12, 2024
diff --git a/.gitmodules b/.gitmodules
@@ -1,7 +1,7 @@
 [submodule "firmware/ChibiOS"]
 	path = firmware/ChibiOS
-	url = https://github.com/rusefi/ChibiOS.git
-	branch = stable_20.3.x.rusefi
+	url = https://github.com/FOME-Tech/ChibiOS.git
+	branch = stable_21.11.x.FOME
 [submodule "firmware/ChibiOS-Contrib"]
 	path = firmware/ChibiOS-Contrib
 	url = https://github.com/rusefi/ChibiOS-Contrib.git
@@ -43,3 +43,5 @@
 	path = firmware/ext/build-tools
 	url = https://github.com/FOME-Tech/build-tools.git
 	branch = main
+[submodule "ChibiOS"]
+	url = https://github.com/FOME-Tech/ChibiOS.git
diff --git a/firmware/ChibiOS b/firmware/ChibiOS
diff --git a/firmware/Makefile b/firmware/Makefile
@@ -169,11 +169,8 @@ include $(CPU_PLATFORM)
 include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
 # RTOS files (optional).
 include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+include $(CHIBIOS)/os/common/ports/ARMv7-M/compilers/GCC/mk/port.mk
 # EX files (optional).
-ifneq ($(USE_LIS302),no)
-  include $(CHIBIOS)/os/ex/devices/ST/lis302dl.mk
-endif
 include $(CHIBIOS)/os/hal/lib/streams/streams.mk
 include $(CHIBIOS)/os/various/cpp_wrappers/chcpp.mk
 

diff --git a/firmware/bootloader/Makefile b/firmware/bootloader/Makefile
@@ -153,7 +153,7 @@ include $(CPU_PLATFORM)
 include $(CHIBIOS)/os/hal/osal/rt-nil/osal.mk
 # RTOS files (optional).
 include $(CHIBIOS)/os/rt/rt.mk
-include $(CHIBIOS)/os/common/ports/ARMCMx/compilers/GCC/mk/port_v7m.mk
+include $(CHIBIOS)/os/common/ports/ARMv7-M/compilers/GCC/mk/port.mk
 include $(CHIBIOS)/os/various/cpp_wrappers/chcpp.mk
 # EX files (optional).
 include $(CHIBIOS)/os/hal/lib/streams/streams.mk

diff --git a/firmware/bootloader/openblt_chibios/openblt_chibios.cpp b/firmware/bootloader/openblt_chibios/openblt_chibios.cpp
@@ -14,8 +14,8 @@ void TimerReset() { }
 void CopService() { }
 void TimerUpdate() { }
 
-extern "C" void __core_init() {
-	// This overrides the built-in __core_init() function
+extern "C" void __cpu_init() {
+	// This overrides the built-in __cpu_init() function
 	// We do this to avoid enabling the D/I caches, which
 	// we'll immediately have to turn back off when jumping
 	// to the main firmware (which will then enable them itself)

diff --git a/firmware/config/boards/nucleo_f429/board.mk b/firmware/config/boards/nucleo_f429/board.mk
@@ -13,3 +13,4 @@ SHORT_BOARD_NAME = stm32f429_nucleo
 
 DDEFS += -DFIRMWARE_ID=\"stm32f429_nucleo\"
 DDEFS += -DDEFAULT_ENGINE_TYPE=MINIMAL_PINS
+DDEFS += -DEFI_MAX_31855=FALSE -DBOARD_L9779_COUNT=0 -DBOARD_TLE8888_COUNT=0
diff --git a/firmware/controllers/core/error_handling.cpp b/firmware/controllers/core/error_handling.cpp
@@ -84,7 +84,7 @@ void chDbgPanic3(const char *msg, const char * file, int line) {
 	dbg_panic_file = file;
 	dbg_panic_line = line;
 #if CH_DBG_SYSTEM_STATE_CHECK
-	ch.dbg.panic_msg = msg;
+	ch0.dbg.panic_msg = msg;
 #endif /* CH_DBG_SYSTEM_STATE_CHECK */
 
 #if !EFI_PROD_CODE

diff --git a/firmware/controllers/system/periodic_task.cpp b/firmware/controllers/system/periodic_task.cpp
@@ -9,7 +9,7 @@
 #include "os_util.h"
 #include "perf_trace.h"
 
-void runAndScheduleNext(PeriodicTimerController *controller) {
+void runAndScheduleNext(virtual_timer_t*, PeriodicTimerController *controller) {
 #if !EFI_UNIT_TEST
 	{
 		ScopePerf perf(PE::PeriodicTimerControllerPeriodicTask);

diff --git a/firmware/controllers/system/periodic_task.h b/firmware/controllers/system/periodic_task.h
@@ -11,7 +11,7 @@
 
 class PeriodicTimerController;
 
-void runAndScheduleNext(PeriodicTimerController *controller);
+void runAndScheduleNext(virtual_timer_t*, PeriodicTimerController *controller);
 
 /**
  * this is an intermediate implementation - we should probably move from using virtual_timer_t which works on interrupts
@@ -40,7 +40,7 @@ class PeriodicTimerController {
 		chVTObjectInit(&timer);
 #endif // EFI_UNIT_TEST
 
-		runAndScheduleNext(this);
+		runAndScheduleNext(nullptr, this);
 	}
 };
 
diff --git a/firmware/docs/rusEFI_custom_chibios.md → firmware/docs/FOME_custom_ChibiOS.md b/firmware/docs/rusEFI_custom_chibios.md → firmware/docs/FOME_custom_ChibiOS.md
@@ -1,12 +1,12 @@
-rusEFI is trying to use latest stable ChibiOS with minimal changes
+FOME is trying to use latest stable ChibiOS with minimal changes
 
-At the moment rusEFI uses https://github.com/rusefi/ChibiOS/tree/stable_20.3.x.rusefi
+At the moment FOME uses https://github.com/FOME-Tech/ChibiOS/tree/stable_21.11.x.FOME
 
-rusEFI custom version of ChibiOS has the following changes:
+FOME custom version of ChibiOS has the following changes:
 
-*) LSE auto-detection/fallback, RUSEFI_STM32_LSE_WAIT_MAX/RUSEFI_STM32_LSE_WAIT_MAX_RTCSEL
+*) LSE auto-detection/fallback, FOME_STM32_LSE_WAIT_MAX/FOME_STM32_LSE_WAIT_MAX_RTCSEL
 
-# TODO items below this line need to be reviewed, seems to NOT be up to date with 20.3 patch
+# TODO items below this line need to be reviewed, seems to NOT be up to date with 21.11 patch
 
 *) minor OS monitoring and maintainability fixes:
    chDbgStackOverflowPanic allows to know which thread has stack overflow
@@ -26,7 +26,6 @@ Weird changes without an explanation:
 
 15) Use QueryPerformanceCounter() instead of POSIX gettimeofday() in os/rt/ports/SIMIA32/chcore.c
 
-New files: 
+New files:
 	os/common/startup/SIMIA32/compilers/GCC/rules.mk
 	os/hal/ports/simulator/posix/*
-
diff --git a/firmware/hw_layer/atwinc1500/wifi_bsp.cpp b/firmware/hw_layer/atwinc1500/wifi_bsp.cpp
@@ -54,7 +54,9 @@ tstrNmBusCapabilities egstrNmBusCapabilities = { .u16MaxTrxSz = 4096 };
 // fast mode is 80mhz/2 = 40MHz
 SPIConfig wifi_spicfg = {
 		.circular = false,
-		.end_cb = NULL,
+		.slave = false,
+		.data_cb = NULL,
+		.error_cb = NULL,
 		.ssport = NULL,
 		.sspad = 0,
 		.cfg1 = 7 // 8 bits per byte
@@ -69,7 +71,9 @@ SPIConfig wifi_spicfg = {
 
 static SPIConfig wifi_spicfg = {
 		.circular = false,
-		.end_cb = NULL,
+		.slave = false,
+		.data_cb = NULL,
+		.error_cb = NULL,
 		.ssport = NULL,
 		.sspad = 0,
 		.cr1 = SPI_BaudRatePrescaler_2,

diff --git a/firmware/hw_layer/mc33816.cpp b/firmware/hw_layer/mc33816.cpp
@@ -22,7 +22,9 @@
 #include "mpu_util.h"
 
 static SPIConfig spiCfg = { .circular = false,
-		.end_cb = NULL,
+		.slave = false,
+		.data_cb = NULL,
+		.error_cb = NULL,
 		.ssport = NULL,
 		.sspad = 0,
 		.cr1 =

diff --git a/firmware/hw_layer/mmc_card.cpp b/firmware/hw_layer/mmc_card.cpp
@@ -323,6 +323,9 @@ void onUsbConnectedNotifyMmcI() {
 #endif /* HAL_USE_USB_MSD */
 
 #if HAL_USE_MMC_SPI
+
+static uint8_t mmcOperationBuffer[32];
+
 /*
  * Attempts to initialize the MMC card.
  * Returns a BaseBlockDevice* corresponding to the SD card if successful, otherwise nullptr.
@@ -351,7 +354,7 @@ static BaseBlockDevice* initializeMmcBlockDevice() {
 	}
 
 	// We think we have everything for the card, let's try to mount it!
-	mmcObjectInit(&MMCD1);
+	mmcObjectInit(&MMCD1, mmcOperationBuffer);
 	mmcStart(&MMCD1, &mmccfg);
 
 	// Performs the initialization procedure on the inserted card.

diff --git a/firmware/hw_layer/ports/chconf_common.h b/firmware/hw_layer/ports/chconf_common.h
@@ -99,6 +99,14 @@ extern "C" {
   irqExitHook();                                                            \
 }
 
+/**
+ * @brief   Runtime Faults Collection Unit hook.
+ * @details This hook is invoked each time new faults are collected and stored.
+ */
+#define CH_CFG_RUNTIME_FAULTS_HOOK(mask) {                                  \
+  /* Faults handling code here.*/                                           \
+}
+
 /**
  * declared as a macro so that this code does not use stack
  * so that it would not crash the error handler in case of stack issues

diff --git a/firmware/hw_layer/ports/rusefi_halconf.h b/firmware/hw_layer/ports/rusefi_halconf.h
@@ -72,6 +72,8 @@
 
 // MMC SPI
 #define MMC_NICE_WAITING            TRUE
+#define MMC_IDLE_TIMEOUT_MS         1000
+#define MMC_USE_MUTUAL_EXCLUSION    FALSE
 
 // PAL
 #define PAL_USE_CALLBACKS           TRUE

diff --git a/firmware/hw_layer/ports/stm32/mcuconf_common_f4_f7.h b/firmware/hw_layer/ports/stm32/mcuconf_common_f4_f7.h
@@ -35,6 +35,25 @@
 #define STM32_ST_IRQ_PRIORITY               8
 #define STM32_ST_USE_TIMER                  2
 
+// Precision scheduling timer
+#define STM32_IRQ_TIM5_PRIORITY         PRECISE_SCHEDULING_TIMER_PRIORITY
+// Fast ADC callback timer
+#define STM32_IRQ_TIM6_PRIORITY             7
+
+#define STM32_IRQ_TIM1_BRK_TIM9_PRIORITY    7
+#define STM32_IRQ_TIM1_UP_TIM10_PRIORITY    7
+#define STM32_IRQ_TIM1_TRGCO_TIM11_PRIORITY 7
+#define STM32_IRQ_TIM1_CC_PRIORITY          7
+#define STM32_IRQ_TIM2_PRIORITY         7
+#define STM32_IRQ_TIM3_PRIORITY         7
+#define STM32_IRQ_TIM4_PRIORITY         7
+// see TIM5/TIM6 above
+#define STM32_IRQ_TIM7_PRIORITY             7
+#define STM32_IRQ_TIM8_BRK_TIM12_PRIORITY   7
+#define STM32_IRQ_TIM8_UP_TIM13_PRIORITY    7
+#define STM32_IRQ_TIM8_TRGCO_TIM14_PRIORITY 7
+#define STM32_IRQ_TIM8_CC_PRIORITY          7
+
 /*
  * ADC driver system settings.
  */
@@ -130,8 +149,10 @@
 #define STM32_GPT_USE_TIM7                  FALSE
 #define STM32_GPT_USE_TIM8                  FALSE
 #define STM32_GPT_USE_TIM9                  FALSE
+#define STM32_GPT_USE_TIM10                 FALSE
 #define STM32_GPT_USE_TIM11                 FALSE
 #define STM32_GPT_USE_TIM12                 FALSE
+#define STM32_GPT_USE_TIM13                 FALSE
 #define STM32_GPT_USE_TIM14                 FALSE
 
 /*
@@ -184,13 +205,11 @@
 #define STM32_ICU_USE_TIM5                  FALSE
 #define STM32_ICU_USE_TIM8                  FALSE
 #define STM32_ICU_USE_TIM9                  FALSE
-#define STM32_ICU_TIM1_IRQ_PRIORITY         ICU_PRIORITY
-#define STM32_ICU_TIM2_IRQ_PRIORITY         ICU_PRIORITY
-#define STM32_ICU_TIM3_IRQ_PRIORITY         ICU_PRIORITY
-#define STM32_ICU_TIM4_IRQ_PRIORITY         ICU_PRIORITY
-#define STM32_ICU_TIM5_IRQ_PRIORITY         ICU_PRIORITY
-#define STM32_ICU_TIM8_IRQ_PRIORITY         ICU_PRIORITY
-#define STM32_ICU_TIM9_IRQ_PRIORITY         ICU_PRIORITY
+#define STM32_ICU_USE_TIM10                 FALSE
+#define STM32_ICU_USE_TIM11                 FALSE
+#define STM32_ICU_USE_TIM12                 FALSE
+#define STM32_ICU_USE_TIM13                 FALSE
+#define STM32_ICU_USE_TIM14                 FALSE
 
 /*
  * MAC driver system settings.
@@ -201,7 +220,7 @@
 #define STM32_MAC_PHY_TIMEOUT               100
 #define STM32_MAC_ETH1_CHANGE_PHY_STATE     TRUE
 #define STM32_MAC_ETH1_IRQ_PRIORITY         13
-#define STM32_MAC_IP_CHECKSUM_OFFLOAD       3
+#define STM32_MAC_IP_CHECKSUM_OFFLOAD       0
 
 /*
  * PWM driver system settings.
@@ -214,13 +233,11 @@
 #define STM32_PWM_USE_TIM5                  TRUE
 #define STM32_PWM_USE_TIM8                  TRUE
 #define STM32_PWM_USE_TIM9                  FALSE
-#define STM32_PWM_TIM1_IRQ_PRIORITY         7
-#define STM32_PWM_TIM2_IRQ_PRIORITY         7
-#define STM32_PWM_TIM3_IRQ_PRIORITY         7
-#define STM32_PWM_TIM4_IRQ_PRIORITY         7
-#define STM32_PWM_TIM5_IRQ_PRIORITY         PRECISE_SCHEDULING_TIMER_PRIORITY
-#define STM32_PWM_TIM8_IRQ_PRIORITY         7
-#define STM32_PWM_TIM9_IRQ_PRIORITY         7
+#define STM32_PWM_USE_TIM10                 FALSE
+#define STM32_PWM_USE_TIM11                 FALSE
+#define STM32_PWM_USE_TIM12                 FALSE
+#define STM32_PWM_USE_TIM13                 FALSE
+#define STM32_PWM_USE_TIM14                 FALSE
 
 /*
  * SERIAL driver system settings.
@@ -375,8 +392,8 @@
 #define STM32_USB_OTG2_IRQ_PRIORITY         14
 #define STM32_USB_OTG1_RX_FIFO_SIZE         512
 #define STM32_USB_OTG2_RX_FIFO_SIZE         1024
-#define STM32_USB_OTG_THREAD_STACK_SIZE     1024
-#define STM32_USB_OTGFIFO_FILL_BASEPRI      0
+#define STM32_USB_HOST_WAKEUP_DURATION      2
+
 
 /*
  * WDG driver system settings.

diff --git a/firmware/hw_layer/ports/stm32/microsecond_timer_stm32.cpp b/firmware/hw_layer/ports/stm32/microsecond_timer_stm32.cpp
@@ -47,9 +47,7 @@ static constexpr PWMConfig timerConfig = {
 		{PWM_OUTPUT_DISABLED, nullptr}
 	},
 	.cr2 = 0,
-#if STM32_PWM_USE_ADVANCED
 	.bdtr = 0,
-#endif
 	.dier = 0
 };
 

diff --git a/firmware/hw_layer/ports/stm32/stm32_common.cpp b/firmware/hw_layer/ports/stm32/stm32_common.cpp
@@ -203,6 +203,7 @@ class stm32_hardware_pwm : public hardware_pwm {
 				{PWM_OUTPUT_ACTIVE_HIGH, nullptr}
 			},
 			0,
+			0,
 			0
 		};
 
@@ -448,7 +449,7 @@ EXTERNC int getRemainingStack(thread_t *otp) {
 	otp->activeStack = r13;
 
 	int remainingStack;
-    if (ch.dbg.isr_cnt > 0) {
+	if (ch0.dbg.isr_cnt > 0) {
 		// ISR context
 		remainingStack = (int)(r13 - 1) - (int)&__main_stack_base__;
 	} else {
@@ -627,7 +628,6 @@ void initSpiModule(SPIDriver *driver, brain_pin_e sck, brain_pin_e miso, brain_p
 }
 
 void initSpiCs(SPIConfig *spiConfig, brain_pin_e csPin) {
-	spiConfig->end_cb = nullptr;
 	ioportid_t port = getHwPort("spi", csPin);
 	ioportmask_t pin = getHwPin("spi", csPin);
 	spiConfig->ssport = port;
@@ -640,7 +640,9 @@ void initSpiCs(SPIConfig *spiConfig, brain_pin_e csPin) {
 // fast mode is 80mhz/2 = 40MHz
 SPIConfig mmc_hs_spicfg = {
 		.circular = false,
-		.end_cb = NULL,
+		.slave = false,
+		.data_cb = NULL,
+		.error_cb = NULL,
 		.ssport = NULL,
 		.sspad = 0,
 		.cfg1 = 7 // 8 bits per byte
@@ -651,7 +653,9 @@ SPIConfig mmc_hs_spicfg = {
 // Slow mode is 80mhz/4 = 20MHz
 SPIConfig mmc_ls_spicfg = {
 		.circular = false,
-		.end_cb = NULL,
+		.slave = false,
+		.data_cb = NULL,
+		.error_cb = NULL,
 		.ssport = NULL,
 		.sspad = 0,
 		.cfg1 = 7 // 8 bits per byte
@@ -670,7 +674,9 @@ SPIConfig mmc_ls_spicfg = {
 // Fast mode is 54 or 27 MHz (technically out of spec, needs testing!)
 SPIConfig mmc_hs_spicfg = {
 		.circular = false,
-		.end_cb = NULL,
+		.slave = false,
+		.data_cb = NULL,
+		.error_cb = NULL,
 		.ssport = NULL,
 		.sspad = 0,
 		.cr1 = SPI_BaudRatePrescaler_2,
@@ -679,7 +685,9 @@ SPIConfig mmc_hs_spicfg = {
 
 SPIConfig mmc_ls_spicfg = {
 		.circular = false,
-		.end_cb = NULL,
+		.slave = false,
+		.data_cb = NULL,
+		.error_cb = NULL,
 		.ssport = NULL,
 		.sspad = 0,
 		.cr1 = SPI_BaudRatePrescaler_8,
Original file line number	Diff line number	Diff line change
Expand Up		@@ -13,3 +13,4 @@ SHORT_BOARD_NAME = stm32f429_nucleo

		DDEFS += -DFIRMWARE_ID=\"stm32f429_nucleo\"
		DDEFS += -DDEFAULT_ENGINE_TYPE=MINIMAL_PINS
		DDEFS += -DEFI_MAX_31855=FALSE -DBOARD_L9779_COUNT=0 -DBOARD_TLE8888_COUNT=0