stress-cache: add write prefetchw option

Add option to perform redundant write prefetch with x86 prefetchw opcode. Signed-off-by: Colin Ian King <[email protected]>
ColinIanKing · Dec 18, 2024 · 1b76fcb · 1b76fcb
1 parent d1566ac
commit 1b76fcb
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Showing 7 changed files with 340 additions and 4 deletions.
diff --git a/Makefile.config b/Makefile.config
@@ -1240,6 +1240,7 @@ cpufeatures: \
 	ASM_X86_PREFETCHT0 \
 	ASM_X86_PREFETCHT1 \
 	ASM_X86_PREFETCHT2 \
+	ASM_X86_PREFETCHW \
 	ASM_X86_RDMSR \
 	ASM_X86_RDPMC \
 	ASM_X86_RDRAND \
@@ -1503,6 +1504,9 @@ ASM_X86_PREFETCHT2:
 ASM_X86_PREFETCHNTA:
 	$(call check,test-asm-x86-prefetchnta,HAVE_ASM_X86_PREFETCHNTA,x86 prefetchtnta instruction)
 
+ASM_X86_PREFETCHW:
+	$(call check,test-asm-x86-prefetchw,HAVE_ASM_X86_PREFETCHW,x86 prefetchw instruction)
+
 ASM_X86_RDMSR:
 	$(call check,test-asm-x86-rdmsr,HAVE_ASM_X86_RDMSR,x86 rdmsr instruction)
 

diff --git a/core-asm-x86.h b/core-asm-x86.h
@@ -315,6 +315,13 @@ static inline void ALWAYS_INLINE stress_asm_x86_prefetchnta(void *p)
 }
 #endif
 
+#if defined(HAVE_ASM_X86_PREFETCHW)
+static inline void ALWAYS_INLINE stress_asm_x86_prefetchw(void *p)
+{
+	__asm__ __volatile__("prefetchw (%0)\n" : : "r"(p) : "memory");
+}
+#endif
+
 #if !defined(HAVE_COMPILER_PCC) && 	\
     defined(STRESS_ARCH_X86_64) && 	\
     defined(STRESS_ARCH_X86_LP64)

diff --git a/core-opts.c b/core-opts.c
@@ -103,6 +103,7 @@ const struct option stress_long_options[] = {
 	{ "cache-no-affinity",	0,	0,	OPT_cache_no_affinity },
 	{ "cache-ops",		1,	0,	OPT_cache_ops },
 	{ "cache-prefetch",	0,	0,	OPT_cache_prefetch },
+	{ "cache-prefetchw",	0,	0,	OPT_cache_prefetchw },
 	{ "cache-sfence",	0,	0,	OPT_cache_sfence },
 	{ "cache-ways",		1,	0,	OPT_cache_ways },
 	{ "cacheline",		1,	0, 	OPT_cacheline },

diff --git a/core-opts.h b/core-opts.h
@@ -248,6 +248,7 @@ typedef enum {
 	OPT_cache_sfence,
 	OPT_cache_no_affinity,
 	OPT_cache_prefetch,
+	OPT_cache_prefetchw,
 	OPT_cache_ways,
 
 	OPT_cacheline,