π Iβm currently working on FPGA hardware and software co-design
π― Iβm looking to collaborate on anything about FPGA
π± Iβm currently learning Linux, Chisel, SystemVerilog
π¬ Ask me about anything related to FPGA
π‘
Writing Bugs
- Shanghai, China
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13:03
(UTC -12:00)
Highlights
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SEU-MSLab/MP
SEU-MSLab/MP PublicThe software and hardware implementation of Memory Polynomial algorithm
SystemVerilog 3
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SEU-MSLab/PRVTDNN
SEU-MSLab/PRVTDNN PublicThe Chisel design of Polyphase Real-Value Time-Delay Neural Network (PRVTDNN).
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