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Added NM180410 Board Support (#1058)
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| common: | ||
| macros: | ||
| - USB_PROD_STR="LPC55xx DAPLink Bootloader" | ||
| sources: | ||
| board: | ||
| - source/board/lpc55s26_bl.c |
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| common: | ||
| macros: | ||
| - USB_PROD_STR="NM180410 DAPLink Bootloader" | ||
| sources: | ||
| board: | ||
| - source/board/lpc55s26_bl.c | ||
| - source/board/nm180410_bl.c |
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| common: | ||
| macros: | ||
| - USB_PROD_STR="NM180410 DAPLink CMSIS-DAP" | ||
| - IO_CONFIG_OVERRIDE | ||
| - SWO_UART=1 | ||
| - HID_LED_DEF=GPIO_LED_OFF | ||
| - CDC_LED_DEF=GPIO_LED_OFF | ||
| - MSC_LED_DEF=GPIO_LED_OFF | ||
| includes: | ||
| - source/board/override_nm180410 | ||
| sources: | ||
| board: | ||
| - source/board/nm180410.c | ||
| family: | ||
| - source/family/ambiq/ama3b1kk/target.c | ||
| - source/family/ambiq/ama3b1kk/target_reset.c |
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| common: | ||
| target: | ||
| - cortex-m33 | ||
| core: | ||
| - Cortex-M33 | ||
| macros: | ||
| - INTERFACE_LPC55XX | ||
| - CPU_LPC55S26JBD64 | ||
| - DAPLINK_HIC_ID=0x4C509955 # DAPLINK_HIC_ID_LPC552X | ||
| - OS_CLOCK=96000000 | ||
| includes: | ||
| - source/hic_hal/nxp/lpc55xx | ||
| - source/hic_hal/nxp/lpc55xx/drivers | ||
| - source/hic_hal/nxp/lpc55xx/LPC55S26 | ||
| sources: | ||
| hic_hal: | ||
| - source/hic_hal/nxp/lpc55xx | ||
| - source/hic_hal/nxp/lpc55xx/drivers | ||
| - source/hic_hal/nxp/lpc55xx/LPC55S26 | ||
|
|
||
| tool_specific: | ||
| gcc_arm: | ||
| misc: | ||
| c_flags: | ||
| - -march=armv8-m.main+fp+dsp | ||
| - -mfloat-abi=hard | ||
| - -mfpu=fpv5-sp-d16 | ||
| ld_flags: | ||
| - -march=armv8-m.main+fp+dsp | ||
| - -mfloat-abi=hard | ||
| - -mfpu=fpv5-sp-d16 | ||
| - -Wl,--defsym=__stack_size__=0x800 | ||
| linker_file: | ||
| - source/hic_hal/nxp/lpc55xx/gcc/lpc55xx.ld | ||
| includes: | ||
| - source/hic_hal/nxp/lpc55xx/gcc | ||
| sources: | ||
| hic_hal: | ||
| - source/hic_hal/nxp/lpc55xx/LPC55S26/gcc | ||
| - source/hic_hal/nxp/lpc55xx/LPC55S26/gcc/libpower_hardabi.a |
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| /** | ||
| * @file lpc55s26_bl.c | ||
| * @brief board ID and meta-data for the hardware interface circuit (HIC) based on the NXP LPC55S26 | ||
| * | ||
| * DAPLink Interface Firmware | ||
| * Copyright (c) 2019-2020, Arm Limited, All Rights Reserved | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| * | ||
| * Licensed under the Apache License, Version 2.0 (the "License"); you may | ||
| * not use this file except in compliance with the License. | ||
| * You may obtain a copy of the License at | ||
| * | ||
| * http://www.apache.org/licenses/LICENSE-2.0 | ||
| * | ||
| * Unless required by applicable law or agreed to in writing, software | ||
| * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT | ||
| * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| * See the License for the specific language governing permissions and | ||
| * limitations under the License. | ||
| */ | ||
|
|
||
| #include "target_config.h" | ||
| #include "daplink_addr.h" | ||
| #include "compiler.h" | ||
| #include "target_board.h" | ||
| #include "target_family.h" | ||
| #include "validation.h" | ||
| #include "flash_hal.h" | ||
|
|
||
| // Warning - changing the interface start will break backwards compatibility | ||
| COMPILER_ASSERT(DAPLINK_ROM_IF_START == (DAPLINK_ROM_START + KB(64))); | ||
|
|
||
| static uint8_t lpc55xx_bootloader_validate_nvic(const uint8_t *buf); | ||
|
|
||
| /** | ||
| * List of start and size for each size of flash sector | ||
| * The size will apply to all sectors between the listed address and the next address | ||
| * in the list. | ||
| * The last pair in the list will have sectors starting at that address and ending | ||
| * at address start + size. | ||
| */ | ||
| static const sector_info_t sectors_info[] = { | ||
| {DAPLINK_ROM_IF_START, DAPLINK_SECTOR_SIZE}, | ||
| }; | ||
|
|
||
| // lpc55s69 target information | ||
| target_cfg_t target_device = { | ||
| .version = kTargetConfigVersion, | ||
| .sectors_info = sectors_info, | ||
| .sector_info_length = (sizeof(sectors_info))/(sizeof(sector_info_t)), | ||
| .flash_regions[0].start = DAPLINK_ROM_IF_START, | ||
| .flash_regions[0].end = DAPLINK_ROM_IF_START + DAPLINK_ROM_IF_SIZE, | ||
| .flash_regions[0].flags = kRegionIsDefault, | ||
| .ram_regions[0].start = 0x20000000, | ||
| .ram_regions[0].end = 0x20018000, | ||
| /* .flash_algo not needed for bootloader */ | ||
| }; | ||
|
|
||
| /*! | ||
| * Special target family for the LPC55xx bootloader. It's only purpose is to override the | ||
| * validate_bin_nvic() routine to prevent bus faults from attempting to read erased flash. | ||
| */ | ||
| static const target_family_descriptor_t g_lpc55xx_bootloader_family = { | ||
| .family_id = 0, | ||
| .validate_bin_nvic = lpc55xx_bootloader_validate_nvic, | ||
| }; | ||
|
|
||
| const target_family_descriptor_t *g_target_family = &g_lpc55xx_bootloader_family; | ||
|
|
||
| const board_info_t g_board_info = { | ||
| .info_version = kBoardInfoVersion, | ||
| .board_id = "0000", | ||
| .daplink_url_name = "HELP_FAQHTM", | ||
| .daplink_drive_name = "BOOTLOADER", | ||
| .daplink_target_url = "https://daplink.io", | ||
| .target_cfg = &target_device, | ||
| }; | ||
|
|
||
| //! @brief Customized NVIC validator. | ||
| //! | ||
| //! This NVIC validator first checks if the passed-in address points to the internal flash | ||
| //! memory. If so, an initial check is made to see if the flash is erased. If it is, then we | ||
| //! can't read from it or the flash controller will generate a bus fault. If the address is | ||
| //! either outside of flash, such as testing a new interface image in RAM, or the flash | ||
| //! sector is programmed, then the standard NVIC validator is called. | ||
| uint8_t lpc55xx_bootloader_validate_nvic(const uint8_t *buf) | ||
| { | ||
| uint32_t addr = (uint32_t)buf; | ||
|
|
||
| // If the address within internal flash? | ||
| if (addr >= DAPLINK_ROM_START && addr < (DAPLINK_ROM_START + DAPLINK_ROM_SIZE)) { | ||
| // If the flash sector is erased, then report that the NVIC is invalid. Otherwise | ||
| // continue below and perform the usual NVIC validation test. | ||
| if (!flash_is_readable(addr, 32)) { | ||
| return 0; | ||
| } | ||
| } | ||
|
|
||
| // Call original implementation. | ||
| return validate_bin_nvic_base(buf); | ||
| } |
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| /** | ||
| * @file nm180410.c | ||
| * @brief board ID for the Northern Mechatronics NM180410 board | ||
| * | ||
| * DAPLink Interface Firmware | ||
| * Copyright (c) 2009-2023, ARM Limited, All Rights Reserved | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| * | ||
| * Licensed under the Apache License, Version 2.0 (the "License"); you may | ||
| * not use this file except in compliance with the License. | ||
| * You may obtain a copy of the License at | ||
| * | ||
| * http://www.apache.org/licenses/LICENSE-2.0 | ||
| * | ||
| * Unless required by applicable law or agreed to in writing, software | ||
| * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT | ||
| * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| * See the License for the specific language governing permissions and | ||
| * limitations under the License. | ||
| */ | ||
|
|
||
| #include "fsl_clock.h" | ||
| #include "fsl_iocon.h" | ||
| #include "pin_mux.h" | ||
|
|
||
| #include "target_board.h" | ||
| #include "target_family.h" | ||
|
|
||
| const board_info_t g_board_info = { | ||
| .info_version = kBoardInfoVersion, | ||
| .family_id = kAmbiq_ama3b1kk_FamilyID, | ||
| .target_cfg = &target_device, | ||
| .daplink_url_name = "NMI HTM", | ||
| .daplink_drive_name = "NMI ", | ||
| .daplink_target_url = "https://www.northernmechatronics.com", | ||
| .board_vendor = "Northern Mechatronics", | ||
| .board_name = "NM180410 Petal Development Board", | ||
| .board_id = "D000", | ||
| }; | ||
|
|
||
| void board_gpio_init(void) | ||
| { | ||
| /* Enables the clock for the I/O controller.: Enable Clock. */ | ||
| CLOCK_EnableClock(kCLOCK_Iocon); | ||
|
|
||
| const uint32_t port0_pin29_config = (/* Pin is configured as FC0_RXD_SDA_MOSI_DATA */ | ||
| IOCON_PIO_FUNC1 | | ||
| /* No addition pin function */ | ||
| IOCON_PIO_MODE_INACT | | ||
| /* Standard mode, output slew rate control is enabled */ | ||
| IOCON_PIO_SLEW_STANDARD | | ||
| /* Input function is not inverted */ | ||
| IOCON_PIO_INV_DI | | ||
| /* Enables digital function */ | ||
| IOCON_PIO_DIGITAL_EN | | ||
| /* Open drain is disabled */ | ||
| IOCON_PIO_OPENDRAIN_DI); | ||
| /* PORT0 PIN29 (coords: 92) is configured as FC0_RXD_SDA_MOSI_DATA */ | ||
| IOCON_PinMuxSet(IOCON, 0U, 29U, port0_pin29_config); | ||
|
|
||
| const uint32_t port0_pin30_config = (/* Pin is configured as FC0_TXD_SCL_MISO_WS */ | ||
| IOCON_PIO_FUNC1 | | ||
| /* No addition pin function */ | ||
| IOCON_PIO_MODE_INACT | | ||
| /* Standard mode, output slew rate control is enabled */ | ||
| IOCON_PIO_SLEW_STANDARD | | ||
| /* Input function is not inverted */ | ||
| IOCON_PIO_INV_DI | | ||
| /* Enables digital function */ | ||
| IOCON_PIO_DIGITAL_EN | | ||
| /* Open drain is disabled */ | ||
| IOCON_PIO_OPENDRAIN_DI); | ||
| /* PORT0 PIN30 (coords: 94) is configured as FC0_TXD_SCL_MISO_WS */ | ||
| IOCON_PinMuxSet(IOCON, 0U, 30U, port0_pin30_config); | ||
| } |
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| /** | ||
| * @file nm180410_bl.c | ||
| * @brief additional configuration for Northern Mechatronics NM180410 | ||
| * LPC55S69 HIC | ||
| * | ||
| * DAPLink Interface Firmware | ||
| * Copyright (c) 2009-2023, ARM Limited, All Rights Reserved | ||
| * SPDX-License-Identifier: Apache-2.0 | ||
| * | ||
| * Licensed under the Apache License, Version 2.0 (the "License"); you may | ||
| * not use this file except in compliance with the License. | ||
| * You may obtain a copy of the License at | ||
| * | ||
| * http://www.apache.org/licenses/LICENSE-2.0 | ||
| * | ||
| * Unless required by applicable law or agreed to in writing, software | ||
| * distributed under the License is distributed on an "AS IS" BASIS, WITHOUT | ||
| * WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. | ||
| * See the License for the specific language governing permissions and | ||
| * limitations under the License. | ||
| */ | ||
|
|
||
| #include "DAP_config.h" | ||
|
|
||
| uint8_t gpio_get_reset_btn_no_fwrd(void) | ||
| { | ||
| // In the Apollo3, an integrated power-on detector monitors the | ||
| // supply voltage and keeps SYSRESETn asserted while VDD rises | ||
| // during power on. SYSRESETn will de-assert once VDD rises above | ||
| // V_POR. This behaviour will cause DAPLink to randomly, albeit | ||
| // rarely, boot into bootloader mode during power up depending | ||
| // on the time it takes VDD to rise above V_POR. The following | ||
| // delay allows VDD to stabilize and ensures the boot behaviour is | ||
| // deterministic. | ||
| // | ||
| // Factoring in the bypass capacitance on the board, the VDD rise | ||
| // time is around 500us to 1ms. The following value targets a delay | ||
| // of at least 3ms at the highest HIC clock frequency of 150MHz. | ||
|
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| volatile uint32_t i = 0; | ||
|
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||
| for (i = 0; i < 500000; i++) | ||
| { | ||
| // if the reset pin floats high, then we can | ||
| // exit the loop early. | ||
| if (PIN_nRESET_IN()) | ||
| { | ||
| return 0; | ||
| } | ||
| } | ||
|
|
||
| return PIN_nRESET_IN() ? 0 : 1; | ||
| } |
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