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fix: fix chiplets bus
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plafer committed Oct 31, 2024
1 parent 766292d commit 0cbcaee
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Showing 2 changed files with 18 additions and 3 deletions.
3 changes: 1 addition & 2 deletions processor/src/chiplets/aux_trace/mod.rs
Original file line number Diff line number Diff line change
Expand Up @@ -63,8 +63,7 @@ impl AuxTraceBuilder {
let b_chip = bus_col_builder.build_aux_column(main_trace, rand_elements);

debug_assert_eq!(*t_chip.last().unwrap(), E::ONE);
// TODO: Fix and re-enable after testing with miden-base
// debug_assert_eq!(*b_chip.last().unwrap(), E::ONE);
debug_assert_eq!(*b_chip.last().unwrap(), E::ONE);
vec![t_chip, b_chip]
}
}
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18 changes: 17 additions & 1 deletion test-utils/src/lib.rs
Original file line number Diff line number Diff line change
Expand Up @@ -34,6 +34,7 @@ pub use vm_core::{
Felt, FieldElement, StackInputs, StackOutputs, StarkField, Word, EMPTY_WORD, ONE, WORD_SIZE,
ZERO,
};
use winter_prover::Trace;

pub mod math {
pub use winter_prover::math::{
Expand Down Expand Up @@ -343,7 +344,22 @@ impl Test {
for library in &self.libraries {
host.load_mast_forest(library.mast_forest().clone());
}
processor::execute(&program, self.stack_inputs.clone(), host, ExecutionOptions::default())
let main_trace = processor::execute(
&program,
self.stack_inputs.clone(),
host,
ExecutionOptions::default(),
)?;

// Build the auxiliary trace too to run the debug assertions
let rand_elements: Vec<_> = {
let num_rand_elements = main_trace.info().get_num_aux_segment_rand_elements();

(0..num_rand_elements).map(|i| Felt::from((i + 1) as u32)).collect()
};
let _aux_trace = main_trace.build_aux_trace(&rand_elements);

Ok(main_trace)
}

/// Compiles the test's source to a Program and executes it with the tests inputs. Returns the
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