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Merge pull request #5847 from Vexu/decl
Take advantage of new HashMap API's preserving order
2 parents f23987d + 9907116 commit 2dcb70a

17 files changed

+40
-749
lines changed

lib/std/target.zig

Lines changed: 24 additions & 15 deletions
Original file line numberDiff line numberDiff line change
@@ -903,25 +903,34 @@ pub const Target = struct {
903903
/// All processors Zig is aware of, sorted lexicographically by name.
904904
pub fn allCpuModels(arch: Arch) []const *const Cpu.Model {
905905
return switch (arch) {
906-
.arm, .armeb, .thumb, .thumbeb => arm.all_cpus,
907-
.aarch64, .aarch64_be, .aarch64_32 => aarch64.all_cpus,
908-
.avr => avr.all_cpus,
909-
.bpfel, .bpfeb => bpf.all_cpus,
910-
.hexagon => hexagon.all_cpus,
911-
.mips, .mipsel, .mips64, .mips64el => mips.all_cpus,
912-
.msp430 => msp430.all_cpus,
913-
.powerpc, .powerpc64, .powerpc64le => powerpc.all_cpus,
914-
.amdgcn => amdgpu.all_cpus,
915-
.riscv32, .riscv64 => riscv.all_cpus,
916-
.sparc, .sparcv9, .sparcel => sparc.all_cpus,
917-
.s390x => systemz.all_cpus,
918-
.i386, .x86_64 => x86.all_cpus,
919-
.nvptx, .nvptx64 => nvptx.all_cpus,
920-
.wasm32, .wasm64 => wasm.all_cpus,
906+
.arm, .armeb, .thumb, .thumbeb => comptime allCpusFromDecls(arm.cpu),
907+
.aarch64, .aarch64_be, .aarch64_32 => comptime allCpusFromDecls(aarch64.cpu),
908+
.avr => comptime allCpusFromDecls(avr.cpu),
909+
.bpfel, .bpfeb => comptime allCpusFromDecls(bpf.cpu),
910+
.hexagon => comptime allCpusFromDecls(hexagon.cpu),
911+
.mips, .mipsel, .mips64, .mips64el => comptime allCpusFromDecls(mips.cpu),
912+
.msp430 => comptime allCpusFromDecls(msp430.cpu),
913+
.powerpc, .powerpc64, .powerpc64le => comptime allCpusFromDecls(powerpc.cpu),
914+
.amdgcn => comptime allCpusFromDecls(amdgpu.cpu),
915+
.riscv32, .riscv64 => comptime allCpusFromDecls(riscv.cpu),
916+
.sparc, .sparcv9, .sparcel => comptime allCpusFromDecls(sparc.cpu),
917+
.s390x => comptime allCpusFromDecls(systemz.cpu),
918+
.i386, .x86_64 => comptime allCpusFromDecls(x86.cpu),
919+
.nvptx, .nvptx64 => comptime allCpusFromDecls(nvptx.cpu),
920+
.wasm32, .wasm64 => comptime allCpusFromDecls(wasm.cpu),
921921

922922
else => &[0]*const Model{},
923923
};
924924
}
925+
926+
fn allCpusFromDecls(comptime cpus: type) []const *const Cpu.Model {
927+
const decls = std.meta.declarations(cpus);
928+
var array: [decls.len]*const Cpu.Model = undefined;
929+
for (decls) |decl, i| {
930+
array[i] = &@field(cpus, decl.name);
931+
}
932+
return &array;
933+
}
925934
};
926935

927936
pub const Model = struct {

lib/std/target/aarch64.zig

Lines changed: 0 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -1505,48 +1505,3 @@ pub const cpu = struct {
15051505
}),
15061506
};
15071507
};
1508-
1509-
/// All aarch64 CPUs, sorted alphabetically by name.
1510-
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
1511-
/// compiler has inefficient memory and CPU usage, affecting build times.
1512-
pub const all_cpus = &[_]*const CpuModel{
1513-
&cpu.apple_a10,
1514-
&cpu.apple_a11,
1515-
&cpu.apple_a12,
1516-
&cpu.apple_a13,
1517-
&cpu.apple_a7,
1518-
&cpu.apple_a8,
1519-
&cpu.apple_a9,
1520-
&cpu.apple_latest,
1521-
&cpu.apple_s4,
1522-
&cpu.apple_s5,
1523-
&cpu.cortex_a35,
1524-
&cpu.cortex_a53,
1525-
&cpu.cortex_a55,
1526-
&cpu.cortex_a57,
1527-
&cpu.cortex_a65,
1528-
&cpu.cortex_a65ae,
1529-
&cpu.cortex_a72,
1530-
&cpu.cortex_a73,
1531-
&cpu.cortex_a75,
1532-
&cpu.cortex_a76,
1533-
&cpu.cortex_a76ae,
1534-
&cpu.cyclone,
1535-
&cpu.exynos_m1,
1536-
&cpu.exynos_m2,
1537-
&cpu.exynos_m3,
1538-
&cpu.exynos_m4,
1539-
&cpu.exynos_m5,
1540-
&cpu.falkor,
1541-
&cpu.generic,
1542-
&cpu.kryo,
1543-
&cpu.neoverse_e1,
1544-
&cpu.neoverse_n1,
1545-
&cpu.saphira,
1546-
&cpu.thunderx,
1547-
&cpu.thunderx2t99,
1548-
&cpu.thunderxt81,
1549-
&cpu.thunderxt83,
1550-
&cpu.thunderxt88,
1551-
&cpu.tsv110,
1552-
};

lib/std/target/amdgpu.zig

Lines changed: 0 additions & 45 deletions
Original file line numberDiff line numberDiff line change
@@ -1276,48 +1276,3 @@ pub const cpu = struct {
12761276
}),
12771277
};
12781278
};
1279-
1280-
/// All amdgpu CPUs, sorted alphabetically by name.
1281-
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
1282-
/// compiler has inefficient memory and CPU usage, affecting build times.
1283-
pub const all_cpus = &[_]*const CpuModel{
1284-
&cpu.bonaire,
1285-
&cpu.carrizo,
1286-
&cpu.fiji,
1287-
&cpu.generic,
1288-
&cpu.generic_hsa,
1289-
&cpu.gfx1010,
1290-
&cpu.gfx1011,
1291-
&cpu.gfx1012,
1292-
&cpu.gfx600,
1293-
&cpu.gfx601,
1294-
&cpu.gfx700,
1295-
&cpu.gfx701,
1296-
&cpu.gfx702,
1297-
&cpu.gfx703,
1298-
&cpu.gfx704,
1299-
&cpu.gfx801,
1300-
&cpu.gfx802,
1301-
&cpu.gfx803,
1302-
&cpu.gfx810,
1303-
&cpu.gfx900,
1304-
&cpu.gfx902,
1305-
&cpu.gfx904,
1306-
&cpu.gfx906,
1307-
&cpu.gfx908,
1308-
&cpu.gfx909,
1309-
&cpu.hainan,
1310-
&cpu.hawaii,
1311-
&cpu.iceland,
1312-
&cpu.kabini,
1313-
&cpu.kaveri,
1314-
&cpu.mullins,
1315-
&cpu.oland,
1316-
&cpu.pitcairn,
1317-
&cpu.polaris10,
1318-
&cpu.polaris11,
1319-
&cpu.stoney,
1320-
&cpu.tahiti,
1321-
&cpu.tonga,
1322-
&cpu.verde,
1323-
};

lib/std/target/arm.zig

Lines changed: 0 additions & 89 deletions
Original file line numberDiff line numberDiff line change
@@ -2145,92 +2145,3 @@ pub const cpu = struct {
21452145
}),
21462146
};
21472147
};
2148-
2149-
/// All arm CPUs, sorted alphabetically by name.
2150-
/// TODO: Replace this with usage of `std.meta.declList`. It does work, but stage1
2151-
/// compiler has inefficient memory and CPU usage, affecting build times.
2152-
pub const all_cpus = &[_]*const CpuModel{
2153-
&cpu.arm1020e,
2154-
&cpu.arm1020t,
2155-
&cpu.arm1022e,
2156-
&cpu.arm10e,
2157-
&cpu.arm10tdmi,
2158-
&cpu.arm1136j_s,
2159-
&cpu.arm1136jf_s,
2160-
&cpu.arm1156t2_s,
2161-
&cpu.arm1156t2f_s,
2162-
&cpu.arm1176j_s,
2163-
&cpu.arm1176jz_s,
2164-
&cpu.arm1176jzf_s,
2165-
&cpu.arm710t,
2166-
&cpu.arm720t,
2167-
&cpu.arm7tdmi,
2168-
&cpu.arm7tdmi_s,
2169-
&cpu.arm8,
2170-
&cpu.arm810,
2171-
&cpu.arm9,
2172-
&cpu.arm920,
2173-
&cpu.arm920t,
2174-
&cpu.arm922t,
2175-
&cpu.arm926ej_s,
2176-
&cpu.arm940t,
2177-
&cpu.arm946e_s,
2178-
&cpu.arm966e_s,
2179-
&cpu.arm968e_s,
2180-
&cpu.arm9e,
2181-
&cpu.arm9tdmi,
2182-
&cpu.cortex_a12,
2183-
&cpu.cortex_a15,
2184-
&cpu.cortex_a17,
2185-
&cpu.cortex_a32,
2186-
&cpu.cortex_a35,
2187-
&cpu.cortex_a5,
2188-
&cpu.cortex_a53,
2189-
&cpu.cortex_a55,
2190-
&cpu.cortex_a57,
2191-
&cpu.cortex_a7,
2192-
&cpu.cortex_a72,
2193-
&cpu.cortex_a73,
2194-
&cpu.cortex_a75,
2195-
&cpu.cortex_a76,
2196-
&cpu.cortex_a76ae,
2197-
&cpu.cortex_a8,
2198-
&cpu.cortex_a9,
2199-
&cpu.cortex_m0,
2200-
&cpu.cortex_m0plus,
2201-
&cpu.cortex_m1,
2202-
&cpu.cortex_m23,
2203-
&cpu.cortex_m3,
2204-
&cpu.cortex_m33,
2205-
&cpu.cortex_m35p,
2206-
&cpu.cortex_m4,
2207-
&cpu.cortex_m7,
2208-
&cpu.cortex_r4,
2209-
&cpu.cortex_r4f,
2210-
&cpu.cortex_r5,
2211-
&cpu.cortex_r52,
2212-
&cpu.cortex_r7,
2213-
&cpu.cortex_r8,
2214-
&cpu.cyclone,
2215-
&cpu.ep9312,
2216-
&cpu.exynos_m1,
2217-
&cpu.exynos_m2,
2218-
&cpu.exynos_m3,
2219-
&cpu.exynos_m4,
2220-
&cpu.exynos_m5,
2221-
&cpu.generic,
2222-
&cpu.iwmmxt,
2223-
&cpu.krait,
2224-
&cpu.kryo,
2225-
&cpu.mpcore,
2226-
&cpu.mpcorenovfp,
2227-
&cpu.neoverse_n1,
2228-
&cpu.sc000,
2229-
&cpu.sc300,
2230-
&cpu.strongarm,
2231-
&cpu.strongarm110,
2232-
&cpu.strongarm1100,
2233-
&cpu.strongarm1110,
2234-
&cpu.swift,
2235-
&cpu.xscale,
2236-
};

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