Skip to content

Commit be071fa

Browse files
djiatsaf-stcfriedt
authored andcommitted
dts: arm: st: h7rs: Add zephyr,memory-attr to SRAM1 and SRAM2 regions
adds the `zephyr,memory-attr` property to the SRAM1 and SRAM2 memory nodes to explicitly define their MPU attributes as normal RAM. This ensures proper memory protection and caching behavior when these regions are used by the kernel or application. Resolve a Data Access Violation encountered during test, where the faulting address was 0x30000000. Note: add the zephyr,memory-attr property in the board overlay for SRAM2 to avoid conflict with the support of h7rs ethernet with MPU regions enabled. see link below for more details : https://github.com/zephyrproject-rtos/zephyr/pull/97364/files#r2439668915 Signed-off-by: Fabrice DJIATSA <[email protected]>
1 parent 3eedfcc commit be071fa

File tree

2 files changed

+16
-0
lines changed

2 files changed

+16
-0
lines changed

dts/arm/st/h7rs/stm32h7rs.dtsi

Lines changed: 6 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -61,13 +61,19 @@
6161
reg = <0x30000000 DT_SIZE_K(16)>;
6262
compatible = "zephyr,memory-region", "mmio-sram";
6363
zephyr,memory-region = "SRAM1";
64+
zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_RAM)>;
6465
};
6566

6667
/* System data RAM accessible over AHB bus: SRAM2 in D2 domain */
6768
sram2: memory@30004000 {
6869
compatible = "zephyr,memory-region", "mmio-sram";
6970
reg = <0x30004000 DT_SIZE_K(16)>;
7071
zephyr,memory-region = "SRAM2";
72+
/* Disable SRAM2 by default to avoid unintended access.
73+
* To enable it, explicitly define zephyr,memory-attr
74+
* to configure MPU attributes.
75+
*/
76+
status = "disabled";
7177
};
7278

7379
dtcm: memory@20000000 {
Lines changed: 10 additions & 0 deletions
Original file line numberDiff line numberDiff line change
@@ -0,0 +1,10 @@
1+
/*
2+
* Copyright (c) 2025 STMicroelectronics
3+
*
4+
* SPDX-License-Identifier: Apache-2.0
5+
*/
6+
7+
&sram2 {
8+
zephyr,memory-attr = <DT_MEM_ARM(ATTR_MPU_RAM)>;
9+
status = "okay";
10+
};

0 commit comments

Comments
 (0)