tests: microblaze: test specific configuration additions for MicroBlaze

Internal references: FWRIVERHD-5201

Signed-off-by: Alp Sayin <[email protected]>

Author: alpsayin

scripts/schemas/twister/platform-schema.yaml

@@ -54,6 +54,7 @@ mapping:
         "sparc",
         "x86",
         "xtensa",
+        "microblaze",
 
         # unit testing
         "unit",

subsys/mgmt/mcumgr/grp/os_mgmt/include/os_mgmt_processor.h

@@ -144,6 +144,8 @@ extern "C" {
 #define PROCESSOR_NAME "xtensa"
 #elif defined(CONFIG_SPARC)
 #define PROCESSOR_NAME "sparc"
+#elif defined(CONFIG_MICROBLAZE)
+#define PROCESSOR_NAME "microblaze"
 #endif
 
 #ifndef PROCESSOR_NAME

tests/kernel/context/src/main.c

@@ -65,17 +65,20 @@
  * unless TICK_IRQ is defined here for them
  */
 #endif /* defined(CONFIG_ARCH_POSIX) */
+#elif defined(CONFIG_MICROBLAZE) && defined(CONFIG_XLNX_TMRCTR)
+#define TICK_IRQ DT_IRQN(DT_INST(CONFIG_XLNX_TMRCTR_TIMER_INDEX, xlnx_tmrctr))
 #else
 
 extern const int32_t z_sys_timer_irq_for_test;
 #define TICK_IRQ (z_sys_timer_irq_for_test)
 
 #endif
 
-/* Cortex-M1 and Nios II do have a power saving instruction, so k_cpu_idle()
+/* Cortex-M1, MicroBlaze and Nios II do have a power saving instruction, so k_cpu_idle()
  * returns immediately
  */
-#if !defined(CONFIG_CPU_CORTEX_M1) && !defined(CONFIG_NIOS2)
+#if !defined(CONFIG_CPU_CORTEX_M1) && !defined(CONFIG_NIOS2) && \
+	(!(defined(CONFIG_MICROBLAZE) && defined(CONFIG_MICROBLAZE_IDLE_NOP)))
 #define HAS_POWERSAVE_INSTRUCTION
 #endif
 

tests/kernel/fatal/exception/src/main.c

@@ -91,7 +91,8 @@ void entry_cpu_exception(void *p1, void *p2, void *p3)
 	__asm__ volatile (".word 0x77777777");
 #else
 	/* Triggers usage fault on ARM, illegal instruction on
-	 * xtensa, TLB exception (instruction fetch) on MIPS.
+	 * xtensa, TLB exception (instruction fetch) on MIPS,
+	 * illegal op-code instruction on microblaze
 	 */
 	{
 		volatile long illegal = 0;
@@ -449,6 +450,11 @@ ZTEST(fatal_exception, test_fatal)
 
 static void *fatal_setup(void)
 {
+
+#if defined(CONFIG_MICROBLAZE)
+	microblaze_enable_exceptions();
+#endif
+
 #if defined(CONFIG_DEMAND_PAGING) && \
 	!defined(CONFIG_LINKER_GENERIC_SECTIONS_PRESENT_AT_BOOT)
 	uintptr_t pin_addr;

tests/kernel/interrupt/src/interrupt_offload.c

@@ -98,6 +98,8 @@ void isr_handler(const void *param)
 #define TEST_IRQ_DYN_LINE 0
 #endif
 
+#elif defined(CONFIG_MICROBLAZE)
+#define TEST_IRQ_DYN_LINE 1
 #else
 #define TEST_IRQ_DYN_LINE 0
 #endif

tests/kernel/mem_protect/stackprot/testcase.yaml

@@ -5,6 +5,7 @@ tests:
       - xtensa
       - posix
       - sparc
+      - microblaze
     tags:
       - kernel
       - userspace

tests/lib/mpsc_pbuf/testcase.yaml

@@ -10,6 +10,7 @@ tests:
       - qemu_cortex_r5
       - qemu_leon3
       - qemu_nios2
+      - qemu_microblaze
       - qemu_riscv32
       - qemu_riscv64
       - qemu_x86