diff --git a/.doctrees/environment.pickle b/.doctrees/environment.pickle
index c904f98..af41193 100644
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diff --git a/.doctrees/hardware/vllink_basic2_to_fpga.doctree b/.doctrees/hardware/vllink_basic2_to_fpga.doctree
new file mode 100644
index 0000000..dff50b9
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diff --git a/.doctrees/index.doctree b/.doctrees/index.doctree
index f22151d..9444396 100644
Binary files a/.doctrees/index.doctree and b/.doctrees/index.doctree differ
diff --git a/.doctrees/quick/vllink_basic2.doctree b/.doctrees/quick/vllink_basic2.doctree
index a32ddf8..9ff1050 100644
Binary files a/.doctrees/quick/vllink_basic2.doctree and b/.doctrees/quick/vllink_basic2.doctree differ
diff --git a/README.html b/README.html
index f12b149..b06b5e9 100644
--- a/README.html
+++ b/README.html
@@ -48,6 +48,7 @@
Vout口使用说明
5V口使用说明
VRef口使用说明
+Vllink Basic2配套FPGA接口转接板
固件更新
diff --git a/_downloads/141cf642e5af5a218a1c58c8e4c35907/interface_basic2_to_fpga.zip b/_downloads/141cf642e5af5a218a1c58c8e4c35907/interface_basic2_to_fpga.zip
new file mode 100644
index 0000000..51582ed
Binary files /dev/null and b/_downloads/141cf642e5af5a218a1c58c8e4c35907/interface_basic2_to_fpga.zip differ
diff --git a/_images/interface_basic2_to_fpga.png b/_images/interface_basic2_to_fpga.png
new file mode 100644
index 0000000..e73efd4
Binary files /dev/null and b/_images/interface_basic2_to_fpga.png differ
diff --git a/_images/interface_basic2_to_fpga.sch.png b/_images/interface_basic2_to_fpga.sch.png
new file mode 100644
index 0000000..9953505
Binary files /dev/null and b/_images/interface_basic2_to_fpga.sch.png differ
diff --git a/_sources/hardware/vllink_basic2_to_fpga.md.txt b/_sources/hardware/vllink_basic2_to_fpga.md.txt
new file mode 100644
index 0000000..6d6aca9
--- /dev/null
+++ b/_sources/hardware/vllink_basic2_to_fpga.md.txt
@@ -0,0 +1,16 @@
+# Vllink Basic2配套FPGA接口转接板
+
+## 示意图
+![](../_static/picture/interface_basic2_to_fpga.png)
+* 从左到右依次为:
+ 1. DC3母座,接上Vllink Basic2调试器
+ 2. 10P 2.00 JTAG牛角座
+ 3. 10P 2.54 JTAG牛角座
+ 4. 14P 2.54 JTAG牛角座
+
+## 原理图
+![](../_static/picture/interface_basic2_to_fpga.sch.png)
+* 原则上,在作为FPGA下载器使用时,务必先将VRef调整至`0V`即外部参考电压模式
+
+## 全套设计文件
+* [interface_basic2_to_fpga.zip](../_static/pcbs/interface_basic2_to_fpga.zip)
\ No newline at end of file
diff --git a/_sources/index.rst.txt b/_sources/index.rst.txt
index 0ab8a0a..ab1adf7 100644
--- a/_sources/index.rst.txt
+++ b/_sources/index.rst.txt
@@ -53,6 +53,7 @@ QQ群:791104674
hardware/vllink_basic_vout.md
hardware/vllink_basic2_5v.md
hardware/vllink_basic2_vref.md
+ hardware/vllink_basic2_to_fpga.md
.. toctree::
:maxdepth: 1
diff --git a/_sources/quick/vllink_basic2.md.txt b/_sources/quick/vllink_basic2.md.txt
index 9a2e4fa..59d90b9 100644
--- a/_sources/quick/vllink_basic2.md.txt
+++ b/_sources/quick/vllink_basic2.md.txt
@@ -90,3 +90,7 @@
* [OpenOCD 使用说明](../software/openocd.md)
* [PyOCD 使用说明](../software/pyocd.md)
* [FreeMASTER 使用说明](../software/freemaster.md)
+
+## 进阶使用
+### FPGA下载器
+* [转接板资料](../hardware/vllink_basic2_to_fpga.md)
diff --git a/_static/pcbs/interface_basic2_to_fpga.zip b/_static/pcbs/interface_basic2_to_fpga.zip
new file mode 100644
index 0000000..51582ed
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diff --git a/genindex.html b/genindex.html
index bad6d81..f84c614 100644
--- a/genindex.html
+++ b/genindex.html
@@ -46,6 +46,7 @@
- Vout口使用说明
- 5V口使用说明
- VRef口使用说明
+- Vllink Basic2配套FPGA接口转接板
固件更新
diff --git a/hardware/aic8800_develop.html b/hardware/aic8800_develop.html
index 356ede5..8a95f1a 100644
--- a/hardware/aic8800_develop.html
+++ b/hardware/aic8800_develop.html
@@ -47,6 +47,7 @@
- Vout口使用说明
- 5V口使用说明
- VRef口使用说明
+- Vllink Basic2配套FPGA接口转接板
固件更新
diff --git a/hardware/vllink_basic2_5v.html b/hardware/vllink_basic2_5v.html
index 3b4db66..074592d 100644
--- a/hardware/vllink_basic2_5v.html
+++ b/hardware/vllink_basic2_5v.html
@@ -52,6 +52,7 @@
VRef口使用说明
+Vllink Basic2配套FPGA接口转接板
固件更新
diff --git a/hardware/vllink_basic2_to_fpga.html b/hardware/vllink_basic2_to_fpga.html
new file mode 100644
index 0000000..acf66db
--- /dev/null
+++ b/hardware/vllink_basic2_to_fpga.html
@@ -0,0 +1,168 @@
+
+
+
+
+
+
+ Vllink Basic2配套FPGA接口转接板 — Vllogic 文档
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+ - »
+ - Vllink Basic2配套FPGA接口转接板
+ -
+ 查看页面源码
+
+
+
+
+
+
+
+
+Vllink Basic2配套FPGA接口转接板
+
+示意图
+
+
+从左到右依次为:
+
+DC3母座,接上Vllink Basic2调试器
+10P 2.00 JTAG牛角座
+10P 2.54 JTAG牛角座
+14P 2.54 JTAG牛角座
+
+
+
+
+
+原理图
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
+
\ No newline at end of file
diff --git a/hardware/vllink_basic2_vref.html b/hardware/vllink_basic2_vref.html
index fceb0f4..14678ec 100644
--- a/hardware/vllink_basic2_vref.html
+++ b/hardware/vllink_basic2_vref.html
@@ -20,7 +20,7 @@
-
+
@@ -56,6 +56,7 @@
+Vllink Basic2配套FPGA接口转接板
固件更新
固件更新
固件更新
diff --git a/objects.inv b/objects.inv
index 493f665..54c84a4 100644
Binary files a/objects.inv and b/objects.inv differ
diff --git a/quick/vllink_basic.html b/quick/vllink_basic.html
index d7abc62..d751f51 100644
--- a/quick/vllink_basic.html
+++ b/quick/vllink_basic.html
@@ -68,6 +68,7 @@
Vout口使用说明
5V口使用说明
VRef口使用说明
+
Vllink Basic2配套FPGA接口转接板
固件更新
diff --git a/quick/vllink_basic2.html b/quick/vllink_basic2.html
index 27e8b99..0c1e209 100644
--- a/quick/vllink_basic2.html
+++ b/quick/vllink_basic2.html
@@ -61,6 +61,10 @@
- 注意事项
- 常见问题
- 开发工具使用说明
+- 进阶使用
+
@@ -69,6 +73,7 @@
Vout口使用说明
5V口使用说明
VRef口使用说明
+
Vllink Basic2配套FPGA接口转接板
固件更新
@@ -280,6 +285,15 @@ 开发工具使用说明
+
diff --git a/quick/vllink_fpga.html b/quick/vllink_fpga.html
index aac36ad..bc8a111 100644
--- a/quick/vllink_fpga.html
+++ b/quick/vllink_fpga.html
@@ -47,6 +47,7 @@
Vout口使用说明
5V口使用说明
VRef口使用说明
+
Vllink Basic2配套FPGA接口转接板
固件更新
固件更新
diff --git a/searchindex.js b/searchindex.js
index 298812a..48d9d08 100644
--- a/searchindex.js
+++ b/searchindex.js
@@ -1 +1 @@
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{"aic8800m": 0, "port": 0, "pad": 0, "function": 0, "gpioa0": 0, "swclk": [0, 5, 6], "lna_en_5g": 0, "pcm_fsync": 0, "i2s_lrck_0": 0, "spi_sck": 0, "gpioa1": 0, "swdio": [0, 5, 6], "pcm_clk": 0, "i2s_bck_0": 0, "spi_csn": 0, "gpioa2": 0, "uart0_rx": 0, "uart1_rx": 0, "tx_en_5g": 0, "pcm_din": 0, "i2s_din_0": 0, "spi_di": 0, "gpioa3": 0, "uart0_tx": 0, "uart1_tx": 0, "rx_en_5g": 0, "pcm_dout": 0, "i2s_dout_0": 0, "spi_do": 0, "gpioa4": 0, "uart0_ct": 0, "uart1_ct": 0, "codec_mclk": 0, "gpioa5": 0, "uart0_rt": 0, "uart1_rt": 0, "gpioa6": 0, "i2cm_scl": 0, "uart2_rx": 0, "pwm_a0": 0, "gpioa7": 0, "i2cm_sda": 0, "uart2_tx": 0, "pwm_a1": 0, "gpioa8": 0, "uart2_ct": 0, "pwm_a2": 0, "gpioa9": 0, "uart2_rt": 0, "gpioa10": 0, "sd_s_d1": 0, "sd_m_d2": 0, "i2s_bck_1": 0, "gpioa11": 0, "sd_s_d0": 0, "sd_m_d3": 0, "i2s_lrck_1": 0, "gpioa12": 0, "sd_s_clk": 0, "sd_m_cmd": 0, "i2s_dout_1": 0, "gpioa13": 0, "sd_s_cmd": 0, "sd_m_clk": 0, "gpioa14": 0, "sd_s_d3": 0, "sd_m_d0": 0, "i2s_din_1": 0, "gpioa15": 0, "sd_s_d2": 0, "sd_m_d1": 0, "ana": 0, "function0": 0, "function1": 0, "function2": 0, "gpiob0": [0, 3], "led0": 0, "adc": 0, "1v": 0, "5v": [0, 2, 3, 4, 5, 6, 19], "gpiob1": 0, "touch": 0, "gpiob2": 0, "led1": 0, "gpiob3": 0, "led2": 0, "pwm_b0": 0, "gpiob4": 0, "xtal1_32k": 0, "aon": 0, "pwm_b1": 0, "mclk_out": 0, "gpiob5": 0, "xtal2_32k": 0, "pwm_b2": 0, "gpiob6": 0, "gpiob7": 0, "gpiob13": 0, "usb_id": 0, "pwm_b3": 0, "gpiob14": 0, "usb_dp": 0, "pwm_b4": 0, "gpiob15": 0, "usb_dm": 0, "pwm_b5": 0, "aic8800fc": 0, "ext": 0, "func": 0, "i2c_scl": 0, "debug_clk": 0, "spi_lcd_sck": 0, "i2c_sda": 0, "aon_uart_tx": 0, "spi_lcd_csn_0": 0, "spi_lcd_di": 0, "spi_lcd_do": 0, "pwm_0": 0, "spi_lcd_cd": 0, "pwm_1": 0, "spi_lcd_fmark": 0, "aon_pwm_0": 0, "spi_lcd_csn_1": 0, "aon_pwm_1": 0, "spi_lcd_csn_2": 0, "aon_pwm_2": 0, "spi_lcd_csn_3": 0, "psi_m_scl": 0, "psi_m_sda": 0, "pwm_2": 0, "host_wake_wl": 0, "gpioa16": 0, "tports0": 0, "wl_wake_host": 0, "gpioa17": 0, "tports1": 0, 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diff --git a/software/freemaster.html b/software/freemaster.html
index e83133d..b99a10f 100644
--- a/software/freemaster.html
+++ b/software/freemaster.html
@@ -49,6 +49,7 @@
- Vout口使用说明
- 5V口使用说明
- VRef口使用说明
+- Vllink Basic2配套FPGA接口转接板
固件更新
diff --git a/software/hercuels_command.html b/software/hercuels_command.html
index 9d95b46..d624c4c 100644
--- a/software/hercuels_command.html
+++ b/software/hercuels_command.html
@@ -49,6 +49,7 @@
- Vout口使用说明
- 5V口使用说明
- VRef口使用说明
+- Vllink Basic2配套FPGA接口转接板
固件更新
固件更新
固件更新
固件更新
固件更新
固件更新
diff --git a/software/segger_embedded_studio.html b/software/segger_embedded_studio.html
index 31cb70a..e72f834 100644
--- a/software/segger_embedded_studio.html
+++ b/software/segger_embedded_studio.html
@@ -49,6 +49,7 @@
- Vout口使用说明
- 5V口使用说明
- VRef口使用说明
+- Vllink Basic2配套FPGA接口转接板
固件更新
固件更新
diff --git a/software/windows7_driver.html b/software/windows7_driver.html
index fe555c3..ed64b6d 100644
--- a/software/windows7_driver.html
+++ b/software/windows7_driver.html
@@ -49,6 +49,7 @@
- Vout口使用说明
- 5V口使用说明
- VRef口使用说明
+- Vllink Basic2配套FPGA接口转接板
固件更新
diff --git a/update/vllink_basic.html b/update/vllink_basic.html
index 00d7536..be38b77 100644
--- a/update/vllink_basic.html
+++ b/update/vllink_basic.html
@@ -21,7 +21,7 @@
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+
@@ -49,6 +49,7 @@
- Vout口使用说明
- 5V口使用说明
- VRef口使用说明
+- Vllink Basic2配套FPGA接口转接板
固件更新
diff --git a/update/vllink_basic2.html b/update/vllink_basic2.html
index 8065151..f7ced0a 100644
--- a/update/vllink_basic2.html
+++ b/update/vllink_basic2.html
@@ -49,6 +49,7 @@
Vout口使用说明
5V口使用说明
VRef口使用说明
+Vllink Basic2配套FPGA接口转接板
固件更新
固件更新