From 50bc712ee0f4f76275f800317f5f36de786a93f2 Mon Sep 17 00:00:00 2001 From: Alex Forencich Date: Mon, 12 Feb 2024 17:42:23 -0800 Subject: [PATCH] fpga/mqnic: Remove extraneous PTP period parameters Signed-off-by: Alex Forencich --- fpga/mqnic/250_SoC/fpga_25g/rtl/fpga.v | 2 -- fpga/mqnic/250_SoC/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/520N_MX/fpga_25g/rtl/fpga.v | 4 ---- fpga/mqnic/520N_MX/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v | 2 -- fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au200.v | 2 -- fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au280.v | 2 -- fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au50.v | 2 -- fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au55.v | 2 -- fpga/mqnic/Alveo/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga.v | 4 ---- fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v | 2 -- fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v | 4 ---- fpga/mqnic/KR260/fpga/rtl/fpga.v | 2 -- fpga/mqnic/KR260/fpga/rtl/fpga_core.v | 4 ---- fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v | 2 -- fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v | 4 ---- fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga.v | 2 -- fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k35.v | 2 -- fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k3p.v | 2 -- fpga/mqnic/VCU108/fpga_25g/rtl/fpga.v | 2 -- fpga/mqnic/VCU108/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v | 2 -- fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xupp3r.v | 2 -- fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xusp3s.v | 2 -- fpga/mqnic/ZCU102/fpga/rtl/fpga.v | 2 -- fpga/mqnic/ZCU102/fpga/rtl/fpga_core.v | 4 ---- fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v | 2 -- fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v | 4 ---- fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v | 2 -- fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v | 4 ---- fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v | 4 ---- fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v | 4 ---- fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga.v | 4 ---- fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga_core.v | 4 ---- 41 files changed, 126 deletions(-) diff --git a/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga.v b/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga.v index 159205080..cc8c13bd4 100644 --- a/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga.v @@ -227,8 +227,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 512; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga_core.v index b7a64ed49..ac413e552 100644 --- a/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/250_SoC/fpga_25g/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -1003,8 +1001,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga.v b/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga.v index 16734c142..0d72cc9b9 100644 --- a/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga.v @@ -191,8 +191,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; @@ -1287,8 +1285,6 @@ fpga_core #( .PTP_PORT_CDC_PIPELINE(PTP_PORT_CDC_PIPELINE), .PTP_PEROUT_ENABLE(PTP_PEROUT_ENABLE), .PTP_PEROUT_COUNT(PTP_PEROUT_COUNT), - .IF_PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .IF_PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), // Queue manager configuration .EVENT_QUEUE_OP_TABLE_SIZE(EVENT_QUEUE_OP_TABLE_SIZE), diff --git a/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga_core.v index ba49c409b..f585a9216 100644 --- a/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/520N_MX/fpga_25g/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -777,8 +775,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v index f366018b4..72b7320e0 100644 --- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga.v @@ -254,8 +254,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h2; -parameter IF_PTP_PERIOD_FNS = 16'h8F5C; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v index 61a98a27b..903eb1411 100644 --- a/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/ADM_PCIE_9V3/fpga_25g/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h2, - parameter IF_PTP_PERIOD_FNS = 16'h8F5C, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -1092,8 +1090,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au200.v b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au200.v index 035ae3023..ee63f28e8 100644 --- a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au200.v +++ b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au200.v @@ -286,8 +286,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au280.v b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au280.v index cb1fde5d0..a36ed4985 100644 --- a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au280.v +++ b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au280.v @@ -242,8 +242,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au50.v b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au50.v index fc6eafc9b..ff5a511e6 100644 --- a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au50.v +++ b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au50.v @@ -190,8 +190,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au55.v b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au55.v index 59c2688d9..49d91c9d9 100644 --- a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au55.v +++ b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_au55.v @@ -195,8 +195,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_core.v index a7fbd2511..2cd708008 100644 --- a/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/Alveo/fpga_25g/rtl/fpga_core.v @@ -52,8 +52,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -1001,8 +999,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga.v b/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga.v index f8175c6bc..15e05526d 100644 --- a/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga.v @@ -188,8 +188,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; @@ -984,8 +982,6 @@ fpga_core #( .PTP_PORT_CDC_PIPELINE(PTP_PORT_CDC_PIPELINE), .PTP_PEROUT_ENABLE(PTP_PEROUT_ENABLE), .PTP_PEROUT_COUNT(PTP_PEROUT_COUNT), - .IF_PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .IF_PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), // Queue manager configuration .EVENT_QUEUE_OP_TABLE_SIZE(EVENT_QUEUE_OP_TABLE_SIZE), diff --git a/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga_core.v index b8a2f73cc..a60e29e5c 100644 --- a/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/DK_DEV_1SMX_H_A/fpga_25g/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -743,8 +741,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v index fa41a0250..47348705c 100644 --- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v +++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga.v @@ -245,8 +245,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 32; parameter PTP_CLK_PERIOD_NS_DENOM = 5; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v index 1eec0c1d5..633d2c04a 100644 --- a/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v +++ b/fpga/mqnic/DNPCIe_40G_KU_LL_2QSFP/fpga/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -1099,8 +1097,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/KR260/fpga/rtl/fpga.v b/fpga/mqnic/KR260/fpga/rtl/fpga.v index 96a1c1a35..5c43b55bf 100644 --- a/fpga/mqnic/KR260/fpga/rtl/fpga.v +++ b/fpga/mqnic/KR260/fpga/rtl/fpga.v @@ -173,8 +173,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 32; parameter PTP_CLK_PERIOD_NS_DENOM = 5; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/KR260/fpga/rtl/fpga_core.v b/fpga/mqnic/KR260/fpga/rtl/fpga_core.v index d67a601c0..460dfdd2a 100644 --- a/fpga/mqnic/KR260/fpga/rtl/fpga_core.v +++ b/fpga/mqnic/KR260/fpga/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -688,8 +686,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v index d7e3a1e8e..ad862b77a 100644 --- a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v +++ b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga.v @@ -214,8 +214,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 32; parameter PTP_CLK_PERIOD_NS_DENOM = 5; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v index 13dceacb3..80bc9c62b 100644 --- a/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v +++ b/fpga/mqnic/NetFPGA_SUME/fpga/rtl/fpga_core.v @@ -42,8 +42,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -645,8 +643,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga.v b/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga.v index 68e327833..8fdab9c22 100644 --- a/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga.v @@ -239,8 +239,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 4; parameter PTP_CLK_PERIOD_NS_DENOM = 1; -parameter IF_PTP_PERIOD_NS = 6'h2; -parameter IF_PTP_PERIOD_FNS = 16'h8F5C; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga_core.v index bdbe5c9f1..5491e7e62 100644 --- a/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/Nexus_K3P_Q/fpga_25g/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h2, - parameter IF_PTP_PERIOD_FNS = 16'h8F5C, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -1134,8 +1132,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_core.v index 4624a73da..ef4a5170e 100644 --- a/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_core.v @@ -46,8 +46,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h2, - parameter IF_PTP_PERIOD_FNS = 16'h8F5C, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -919,8 +917,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k35.v b/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k35.v index 208461c3a..adef1fa87 100644 --- a/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k35.v +++ b/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k35.v @@ -209,8 +209,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k3p.v b/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k3p.v index bf6f5f540..bc928fa51 100644 --- a/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k3p.v +++ b/fpga/mqnic/Nexus_K3P_S/fpga_25g/rtl/fpga_k3p.v @@ -208,8 +208,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 4; parameter PTP_CLK_PERIOD_NS_DENOM = 1; -parameter IF_PTP_PERIOD_NS = 6'h2; -parameter IF_PTP_PERIOD_FNS = 16'h8F5C; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/VCU108/fpga_25g/rtl/fpga.v b/fpga/mqnic/VCU108/fpga_25g/rtl/fpga.v index 94c5f3612..2ba46d8b8 100644 --- a/fpga/mqnic/VCU108/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/VCU108/fpga_25g/rtl/fpga.v @@ -254,8 +254,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 32; parameter PTP_CLK_PERIOD_NS_DENOM = 5; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/VCU108/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/VCU108/fpga_25g/rtl/fpga_core.v index 22b7809ea..6295a173f 100644 --- a/fpga/mqnic/VCU108/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/VCU108/fpga_25g/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -905,8 +903,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v index 3ef2d8331..edb42100c 100644 --- a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga.v @@ -271,8 +271,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 32; parameter PTP_CLK_PERIOD_NS_DENOM = 5; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v index fcb1c8df7..52a35a708 100644 --- a/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/VCU118/fpga_25g/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -1048,8 +1046,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v index 138fdea65..058813271 100644 --- a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_core.v @@ -47,8 +47,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 0, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -1425,8 +1423,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xupp3r.v b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xupp3r.v index 344f6a0da..cf3236bb7 100644 --- a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xupp3r.v +++ b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xupp3r.v @@ -334,8 +334,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 512; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xusp3s.v b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xusp3s.v index 12fbe97d5..315c18307 100644 --- a/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xusp3s.v +++ b/fpga/mqnic/XUPP3R/fpga_25g/rtl/fpga_xusp3s.v @@ -340,8 +340,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 512; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/ZCU102/fpga/rtl/fpga.v b/fpga/mqnic/ZCU102/fpga/rtl/fpga.v index 02ac688a5..a3011ea5c 100644 --- a/fpga/mqnic/ZCU102/fpga/rtl/fpga.v +++ b/fpga/mqnic/ZCU102/fpga/rtl/fpga.v @@ -218,8 +218,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 32; parameter PTP_CLK_PERIOD_NS_DENOM = 5; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/ZCU102/fpga/rtl/fpga_core.v b/fpga/mqnic/ZCU102/fpga/rtl/fpga_core.v index 34d52e47b..fbd7f1e1d 100644 --- a/fpga/mqnic/ZCU102/fpga/rtl/fpga_core.v +++ b/fpga/mqnic/ZCU102/fpga/rtl/fpga_core.v @@ -46,8 +46,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -772,8 +770,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v index 4ff4d6d30..1701b1327 100644 --- a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v +++ b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga.v @@ -219,8 +219,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 32; parameter PTP_CLK_PERIOD_NS_DENOM = 5; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v index 810c1708b..5b104d15a 100644 --- a/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v +++ b/fpga/mqnic/ZCU106/fpga_pcie/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -763,8 +761,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v index 8a5210925..032cc3871 100644 --- a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v +++ b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga.v @@ -208,8 +208,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 32; parameter PTP_CLK_PERIOD_NS_DENOM = 5; -parameter IF_PTP_PERIOD_NS = 6'h6; -parameter IF_PTP_PERIOD_FNS = 16'h6666; // Interface configuration parameter PTP_TS_FMT_TOD = 0; diff --git a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v index 2281de49c..660d18d51 100644 --- a/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v +++ b/fpga/mqnic/ZCU106/fpga_zynqmp/rtl/fpga_core.v @@ -46,8 +46,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h6, - parameter IF_PTP_PERIOD_FNS = 16'h6666, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -726,8 +724,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v index 30c952dc2..f76ed7c5a 100644 --- a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga.v @@ -301,8 +301,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h2; -parameter IF_PTP_PERIOD_FNS = 16'h8F5C; // Interface configuration parameter PTP_TS_FMT_TOD = 0; @@ -2062,8 +2060,6 @@ fpga_core #( .PTP_PORT_CDC_PIPELINE(PTP_PORT_CDC_PIPELINE), .PTP_PEROUT_ENABLE(PTP_PEROUT_ENABLE), .PTP_PEROUT_COUNT(PTP_PEROUT_COUNT), - .IF_PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .IF_PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), // Queue manager configuration .EVENT_QUEUE_OP_TABLE_SIZE(EVENT_QUEUE_OP_TABLE_SIZE), diff --git a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v index b4c06624f..68a24566e 100644 --- a/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/fb2CG/fpga_25g/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h2, - parameter IF_PTP_PERIOD_FNS = 16'h8F5C, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -1106,8 +1104,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH), diff --git a/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga.v b/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga.v index 768da711f..1d0f45b0b 100644 --- a/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga.v +++ b/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga.v @@ -318,8 +318,6 @@ module fpga # // PTP configuration parameter PTP_CLK_PERIOD_NS_NUM = 1024; parameter PTP_CLK_PERIOD_NS_DENOM = 165; -parameter IF_PTP_PERIOD_NS = 6'h2; -parameter IF_PTP_PERIOD_FNS = 16'h8F5C; // Interface configuration parameter PTP_TS_FMT_TOD = 0; @@ -2414,8 +2412,6 @@ fpga_core #( .PTP_PORT_CDC_PIPELINE(PTP_PORT_CDC_PIPELINE), .PTP_PEROUT_ENABLE(PTP_PEROUT_ENABLE), .PTP_PEROUT_COUNT(PTP_PEROUT_COUNT), - .IF_PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .IF_PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), // Queue manager configuration .EVENT_QUEUE_OP_TABLE_SIZE(EVENT_QUEUE_OP_TABLE_SIZE), diff --git a/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga_core.v b/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga_core.v index 81a1e6587..39eba6e05 100644 --- a/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga_core.v +++ b/fpga/mqnic/fb4CGg3/fpga_25g/rtl/fpga_core.v @@ -45,8 +45,6 @@ module fpga_core # parameter PTP_PORT_CDC_PIPELINE = 0, parameter PTP_PEROUT_ENABLE = 1, parameter PTP_PEROUT_COUNT = 1, - parameter IF_PTP_PERIOD_NS = 6'h2, - parameter IF_PTP_PERIOD_FNS = 16'h8F5C, // Queue manager configuration parameter EVENT_QUEUE_OP_TABLE_SIZE = 32, @@ -1403,8 +1401,6 @@ generate .ENABLE_PADDING(ENABLE_PADDING), .ENABLE_DIC(ENABLE_DIC), .MIN_FRAME_LENGTH(MIN_FRAME_LENGTH), - .PTP_PERIOD_NS(IF_PTP_PERIOD_NS), - .PTP_PERIOD_FNS(IF_PTP_PERIOD_FNS), .PTP_TS_ENABLE(PTP_TS_ENABLE), .PTP_TS_FMT_TOD(PTP_TS_FMT_TOD), .PTP_TS_WIDTH(PTP_TS_WIDTH),