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mycelium-hal's interrupts trait is stupid #337

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hawkw opened this issue Oct 2, 2024 · 3 comments · Fixed by #343
Closed

mycelium-hal's interrupts trait is stupid #337

hawkw opened this issue Oct 2, 2024 · 3 comments · Fixed by #343
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area: kernel Related to the cross-platform kernel platform: x86_64 Specific to the x86_64 hardware platform

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@hawkw
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hawkw commented Oct 2, 2024

in ancient days, i was foolish and succumbed to hubris, by thinking that a cross-platform abstraction over interrupts was a cool idea and could be fun to do. so, the mycelium HAL uses a trait with a bunch of methods to represent generic interrupt handlers

it turns out that this sucks and is bad and i hate it. in particular it makes writing handlers for platform specific interrupts really painful, and makes it hard to e.g. use all the different timers that exist on x86. we should rip that thing out of the x86 MnemOS platform and actually put stuff in the IDT ourselves, like normal people.

@hawkw hawkw self-assigned this Oct 2, 2024
@hawkw hawkw added area: kernel Related to the cross-platform kernel platform: x86_64 Specific to the x86_64 hardware platform labels Oct 2, 2024
@hawkw
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hawkw commented Oct 2, 2024

in particular i would still quite like to write an async serial port driver for the LPC UART (c.f. #222, from AN ENTIRE GODDAMN YEAR AGO). i have been violently reminded that there is just “no way” to get the IRQs i need for that, because i didn’t put them in the stupid fucking trait, and then i had written a stupid and worse serial port driver that flushed by busy looping anyway because im a fucking dumb bitch. so, in the fullness of time, i have now come to believe that the best solution is to travel back in time and kill myself before i can do that.

since we can't do that, though, we should just make the IDT stuff public and consign the stupid fucking interrupts trait to the trash heap of history.

@hawkw
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hawkw commented Oct 2, 2024

OH GOD. if we want to do this we are probably gonna have to update our Mycelium dep,1 which means i have to figure out what i had done with the new timer API, and confront whatever problem stopped us from updating to use it the first time. hopefully the problem was just my own laziness, but i doubt it

Footnotes

  1. unless i had the foresight to make everything needed for the raw IDT types public, which i probably didn't, because — as we have established, i am a dumbass.

hawkw added a commit to hawkw/mycelium that referenced this issue Oct 6, 2024
MnemOS would like us to provide lower-level access to the IDT in
`hal-x86_64` so that they can work around the nice, high level
abstractions we worked so hard to provide for them (see
tosc-rs/mnemos#337). This PR capitulates to mnemOS' demands by making
the IDT methods for registering raw ISR functions public. I hope mnemOS
doesn't shoot themselves in the foot using this :)
hawkw added a commit to hawkw/mycelium that referenced this issue Oct 8, 2024
MnemOS would like us to provide lower-level access to the IDT in
`hal-x86_64` so that they can work around the nice, high level
abstractions we worked so hard to provide for them (see
tosc-rs/mnemos#337). This PR capitulates to mnemOS' demands by making
the IDT methods for registering raw ISR functions public. I hope mnemOS
doesn't shoot themselves in the foot using this :)
@hawkw
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hawkw commented Oct 18, 2024

Upstream has finally decided to unblock us by permitting raw IDT access in hawkw/mycelium#487.

I've started working on #343 to pick up the latest Mycelium deps; I've got the x86 kernel working with the new Mycelium timer API, but I seem to have busted something on the D1, which I'm presently investigating.

github-merge-queue bot pushed a commit that referenced this issue Dec 27, 2024
This updates our dependencies on Mycelium crates to
hawkw/mycelium@ba56bb4.

This picks up the new `maitake` timer API, as well as the upstream
change hawkw/mycelium#487 to allow raw access to the IDT in the Mycelium
x86_64 HAL, which we need to do an async UART driver (see #337).

While updating everything to use the new timer API, I also made some
tweaks to our existing timer code, including implementing 32-bit timer
rollover for the D1's TIMER0 (our current timestamp source on that
platform). This was an ancient TODO item since basically forever.

Fixes #337

---------

Co-authored-by: Anatol Ulrich <[email protected]>
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