This project automates process of creating a PYNQ Z1/Z2 Overlay in Vivado, generates a custom Juypter Notebook template and uploads to a target PYNQ FPGA.

Dataflow QNN inference accelerator examples on FPGAs

Hardware Accelerators on FPGA for Computer Vision Applications

Python Productivity for ZYNQ

This repository serves as both a theoretical and practical guide to performing summations in FPGAs, specifically using the RedPitaya 125-14 and Vivado. The goal is to aid in the understanding and implementation of projects that involve this type of problem.

PYNQ for Zybo board

Debian12 Boot Image (U-boot, Linux Kernel, Debian12 RootFS) for ZYBO/ZYBO-Z7/PYNQ-Z1/DE10-Nano/DE0-Nano-SoC

PYNQ-ZU, XUP UltraScale+ MPSoC academic board

MNIST accelerator using binary qunatization on Xilinx pynq-z2

中文版 Parallel Programming for FPGAs

NN Training at the Edge with PyTorch, PYNQ and an Ultra96-V2 board

PYNQ bindings for C and C++ to avoid requiring Python or Vitis to execute hardware acceleration.

RFSoC Spectrum Analyser Module on PYNQ.

This is a collection of some examples designed in the Vivado Design Suite.

PYNQ Tutorials

PYNQ Composabe Overlays

Hardware Accelerator for ML

Benchmarking GNSS system at the Xilinx PYNQ FPGA based platform

PYNQ enabled Genesys ZU Open Source Instrument, based on Pavel Demin's Red Pitaya Notes workflow.

DPU on PYNQ