The codes accompanied with STEPFPGA tutorial book
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Updated
Aug 1, 2023 - Verilog
The codes accompanied with STEPFPGA tutorial book
Concepts of Digital Logic Design
A sandbox for simulating logic gates
This program is a simulation of ALU operation process. The program enable user to add two bytes(8 bits) and produce the result. Addition of each bit will go through to the adder, which includes specific logic gates
Complex Programmable Logic Device (CPLD) Guide
Simple Implementation for Logic Gates Project represented in Physics (BS221) Course. Implemented with C++.
This is logicgates function repository with PowerShell
Logic Gate Simulator
This is this VLSI designing Project. This Project is created in Cadence Virtuoso. See the PDF for Pre-Post layout results and other details
A-Level Computing Project (LogicSim)
This Repo contains Projects implemented For this Course
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