100% rejection rate

[fstarr]

I successfully implemented the FPGA design on a Xilinx Spartan 3AN (xc3s700an) but when I run the mining script miner.py I get a rejection rate of 100%. Might this issue be related to the one discussed here: progranism/Open-Source-FPGA-Bitcoin-Miner#9?

 Miner started on Mon Jun 10 18:31:43 2013
 Block found on Mon Jun 10 19:03:33 2013
 Upstream result: False
 [0 accepted, 1 failed, 2.25 +/- 2.25 Mhash/s]
 Block found on Mon Jun 10 20:28:10 2013
 Upstream result: False
 [0 accepted, 2 failed, 1.23 +/- 0.87 Mhash/s]
 ...
 [0 accepted, 6 failed, 2.92 +/- 1.19 Mhash/s]

[teknohog]

It's hard to say anything without any deeper information, so here are a few ideas to try:

Grab a new version of miner.py from

https://github.com/teknohog/Open-Source-FPGA-Bitcoin-Miner/tree/master/projects/Verilog_Xilinx_Port

Run it with the -d or --debug option and a bogus url. Then it will insert test data that gives the nonce 063c5e01.

In fact, try using my later projects instead of the 2 year olf Xilinx Serial Miner, which is no longer updated.

Another thing to check is that the clockrate for the serial-port modules matches the hash clock.