diff --git a/components/bt/host/bluedroid/stack/btm/btm_ble.c b/components/bt/host/bluedroid/stack/btm/btm_ble.c index 334001fe7b97..0d1e8fd6268b 100644 --- a/components/bt/host/bluedroid/stack/btm/btm_ble.c +++ b/components/bt/host/bluedroid/stack/btm/btm_ble.c @@ -217,7 +217,7 @@ void BTM_BleLoadLocalKeys(UINT8 key_type, tBTM_BLE_LOCAL_KEYS *p_key) break; default: - BTM_TRACE_ERROR("unknow local key type: %d", key_type); + BTM_TRACE_ERROR("unknown local key type: %d", key_type); break; } } @@ -694,7 +694,7 @@ void BTM_ReadDevInfo (BD_ADDR remote_bda, tBT_DEVICE_TYPE *p_dev_type, tBLE_ADDR BTM_TRACE_DEBUG ("btm_find_dev_type - unknown device, BR/EDR assumed"); } } - } else { /* there is a security device record exisitng */ + } else { /* there is a security device record existing */ /* new inquiry result, overwrite device type in security device record */ if (p_inq_info) { p_dev_rec->device_type = p_inq_info->results.device_type; @@ -707,7 +707,7 @@ void BTM_ReadDevInfo (BD_ADDR remote_bda, tBT_DEVICE_TYPE *p_dev_type, tBLE_ADDR } else if (memcmp(p_dev_rec->ble.pseudo_addr, remote_bda, BD_ADDR_LEN) == 0) { *p_dev_type = BT_DEVICE_TYPE_BLE; *p_addr_type = p_dev_rec->ble.ble_addr_type; - } else { /* matching static adddress only */ + } else { /* matching static address only */ *p_dev_type = BT_DEVICE_TYPE_BREDR; *p_addr_type = BLE_ADDR_PUBLIC; } @@ -1061,7 +1061,7 @@ tBTM_SEC_ACTION btm_ble_determine_security_act(BOOLEAN is_originator, BD_ADDR bd ** LE link for LE COC. ** ** Parameter bdaddr: remote device address. -** psm : PSM of the LE COC sevice. +** psm : PSM of the LE COC service. ** is_originator: TRUE if outgoing connection. ** p_callback : Pointer to the callback function. ** p_ref_data : Pointer to be returned along with the callback. @@ -1078,7 +1078,7 @@ BOOLEAN btm_ble_start_sec_check(BD_ADDR bd_addr, UINT16 psm, BOOLEAN is_originat /* If there is no application registered with this PSM do not allow connection */ if (!p_serv_rec) { - BTM_TRACE_WARNING ("%s PSM: %d no application registerd", __func__, psm); + BTM_TRACE_WARNING ("%s PSM: %d no application registered", __func__, psm); (*p_callback) (bd_addr, BT_TRANSPORT_LE, p_ref_data, BTM_MODE_UNSUPPORTED); return FALSE; } @@ -1151,7 +1151,7 @@ void btm_ble_rand_enc_complete (UINT8 *p, UINT16 op_code, tBTM_RAND_ENC_CB *p_en /* If there was a callback address for vcs complete, call it */ if (p_enc_cplt_cback && p) { - /* Pass paramters to the callback function */ + /* Pass parameters to the callback function */ STREAM_TO_UINT8(params.status, p); /* command status */ if (params.status == HCI_SUCCESS) { @@ -1208,7 +1208,7 @@ void btm_ble_increment_sign_ctr(BD_ADDR bd_addr, BOOLEAN is_local ) ** Function btm_ble_get_enc_key_type ** ** Description This function is to get the BLE key type that has been exchanged -** in betweem local device and peer device. +** in between local device and peer device. ** ** Returns p_key_type: output parameter to carry the key type value. ** @@ -1235,7 +1235,7 @@ BOOLEAN btm_ble_get_enc_key_type(BD_ADDR bd_addr, UINT8 *p_key_types) ** ** Description This function is called to read the local DIV ** -** Returns TRUE - if a valid DIV is availavle +** Returns TRUE - if a valid DIV is available *******************************************************************************/ BOOLEAN btm_get_local_div (BD_ADDR bd_addr, UINT16 *p_div) { @@ -1487,7 +1487,7 @@ void btm_ble_link_sec_check(BD_ADDR bd_addr, tBTM_LE_AUTH_REQ auth_req, tBTM_BLE BTM_TRACE_DEBUG ("dev_rec sec_flags=0x%x", p_dev_rec->sec_flags); - /* currently encrpted */ + /* currently encrypted */ if (p_dev_rec->sec_flags & BTM_SEC_LE_ENCRYPTED) { if (p_dev_rec->sec_flags & BTM_SEC_LE_AUTHENTICATED) { cur_sec_level = BTM_LE_SEC_AUTHENTICATED; @@ -1691,7 +1691,7 @@ tBTM_STATUS btm_ble_start_encrypt(BD_ADDR bda, BOOLEAN use_stk, BT_OCTET16 stk) ** ** Function btm_ble_link_encrypted ** -** Description This function is called when LE link encrption status is changed. +** Description This function is called when LE link encryption status is changed. ** ** Returns void ** @@ -1949,7 +1949,7 @@ static void btm_ble_resolve_random_addr_on_conn_cmpl(void *p_rec, void *p_data) ** Function btm_ble_connected ** ** Description This function is when a LE connection to the peer device is -** establsihed +** established ** ** Returns void ** @@ -2060,7 +2060,7 @@ void btm_ble_conn_complete(UINT8 *p, UINT16 evt_len, BOOLEAN enhanced) peer_addr_type = bda_type; match = btm_identity_addr_to_random_pseudo (bda, &bda_type, FALSE); - /* possiblly receive connection complete with resolvable random on + /* possibly receive connection complete with resolvable random on slave role while the device has been paired */ /* It will cause that scanner doesn't send scan request to advertiser @@ -2143,6 +2143,16 @@ void btm_ble_create_ll_conn_complete (UINT8 status) if (status != HCI_SUCCESS) { btm_ble_set_conn_st(BLE_CONN_IDLE); btm_ble_update_mode_operation(HCI_ROLE_UNKNOWN, NULL, status); + if(l2cb.is_ble_connecting) { + /* see L2CA_CancelBleConnectReq() */ + tL2C_LCB *p_lcb = l2cu_find_lcb_by_bd_addr(l2cb.ble_connecting_bda, BT_TRANSPORT_LE); + /* Do not remove lcb if an LE link is already up as a peripheral */ + if (p_lcb != NULL && + !(p_lcb->link_role == HCI_ROLE_SLAVE && BTM_ACL_IS_CONNECTED(l2cb.ble_connecting_bda))) { + p_lcb->disc_reason = L2CAP_CONN_CANCEL; + l2cu_release_lcb (p_lcb); + } + } } } @@ -2300,7 +2310,7 @@ UINT8 btm_proc_smp_cback(tSMP_EVT event, BD_ADDR bd_addr, tSMP_EVT_DATA *p_data) ** Function BTM_BleDataSignature ** ** Description This function is called to sign the data using AES128 CMAC -** algorith. +** algorithm. ** ** Parameter bd_addr: target device the data to be signed for. ** p_text: singing data @@ -2308,7 +2318,7 @@ UINT8 btm_proc_smp_cback(tSMP_EVT event, BD_ADDR bd_addr, tSMP_EVT_DATA *p_data) ** signature: output parameter where data signature is going to ** be stored. ** -** Returns TRUE if signing sucessul, otherwise FALSE. +** Returns TRUE if signing successful, otherwise FALSE. ** *******************************************************************************/ #if (SMP_INCLUDED == TRUE) @@ -2491,7 +2501,7 @@ BOOLEAN BTM_BleSecurityProcedureIsRunning(BD_ADDR bd_addr) ** Function BTM_BleGetSupportedKeySize ** ** Description This function gets the maximum encryption key size in bytes -** the local device can suport. +** the local device can support. ** record. ** ** Returns the key size or 0 if the size can't be retrieved. diff --git a/components/bt/host/bluedroid/stack/btu/btu_hcif.c b/components/bt/host/bluedroid/stack/btu/btu_hcif.c index f20c6e4eefb1..b787c20aa16a 100644 --- a/components/bt/host/bluedroid/stack/btu/btu_hcif.c +++ b/components/bt/host/bluedroid/stack/btu/btu_hcif.c @@ -1369,6 +1369,9 @@ static void btu_hcif_hdl_command_status (UINT16 opcode, UINT8 status, UINT8 *p_c break; #if BLE_INCLUDED == TRUE +#if (BLE_50_FEATURE_SUPPORT == TRUE) + case HCI_BLE_EXT_CREATE_CONN: +#endif // #if (BLE_50_FEATURE_SUPPORT == TRUE) case HCI_BLE_CREATE_LL_CONN: btm_ble_create_ll_conn_complete(status); break; diff --git a/components/esp_coex/Kconfig b/components/esp_coex/Kconfig index 8dd2ec3fcc25..d5de082a3c37 100644 --- a/components/esp_coex/Kconfig +++ b/components/esp_coex/Kconfig @@ -26,4 +26,11 @@ menu "Wireless Coexistence" This function depends on BT-off because currently we do not support external coex and internal coex simultaneously. + config ESP_COEX_POWER_MANAGEMENT + bool "Support power management under coexistence" + default n + depends on (ESP_COEX_SW_COEXIST_ENABLE) + help + If enabled, coexist power management will be enabled. + endmenu # Wireless Coexistence diff --git a/components/esp_coex/include/private/esp_coexist_internal.h b/components/esp_coex/include/private/esp_coexist_internal.h index 7aee0c053338..20cea8a437b4 100644 --- a/components/esp_coex/include/private/esp_coexist_internal.h +++ b/components/esp_coex/include/private/esp_coexist_internal.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2018-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2018-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -313,7 +313,7 @@ esp_err_t esp_coex_adapter_register(coex_adapter_funcs_t *funcs); #if CONFIG_EXTERNAL_COEX_ENABLE /** - * @brief Set external coexistence advanced informations, like working mode. + * @brief Set external coexistence advanced information, like working mode. * * @param out_pti1 This parameter no longer works, will be deprecated and later removed in future releases. * @param out_pti2 This parameter no longer works, will be deprecated and later removed in future releases. @@ -365,6 +365,25 @@ void esp_coex_external_set_txline(bool en); #endif /*SOC_EXTERNAL_COEX_LEADER_TX_LINE*/ #endif /*External Coex*/ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT +/** + * @brief Set coexist scheme flexible period + * + * @param period flexible period + * + * @return + * - ESP_OK: succeed + */ +int coex_schm_flexible_period_set(uint8_t period); + +/** + * @brief Get coexist scheme flexible period + * + * @return Coexist scheme flexible period + */ +uint8_t coex_schm_flexible_period_get(void); +#endif + /** * @brief Check the MD5 values of the coexistence adapter header files in IDF and WiFi library * diff --git a/components/esp_coex/lib b/components/esp_coex/lib index 2717868407a0..94ebf43111a5 160000 --- a/components/esp_coex/lib +++ b/components/esp_coex/lib @@ -1 +1 @@ -Subproject commit 2717868407a01878a49d19794538b6da120597ae +Subproject commit 94ebf43111a5889a3a97fd470b7148cd6b692b7c diff --git a/components/esp_hw_support/port/esp32c6/pmu_sleep.c b/components/esp_hw_support/port/esp32c6/pmu_sleep.c index c85fd72c2c79..7396e41b8c23 100644 --- a/components/esp_hw_support/port/esp32c6/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32c6/pmu_sleep.c @@ -236,6 +236,10 @@ const pmu_sleep_config_t* pmu_sleep_config_default( analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = PMU_DBG_ATTEN_ACTIVE_DEFAULT; analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_act_lp_dbias(); + } else if (!(pd_flags & PMU_SLEEP_PD_RC_FAST)) { + analog_default.hp_sys.analog.dbias = get_act_hp_dbias(); + analog_default.lp_sys[LP(SLEEP)].analog.dbg_atten = PMU_DBG_ATTEN_LIGHTSLEEP_NODROP; + analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_act_lp_dbias(); } config->analog = analog_default; diff --git a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h index 950a3ac91b7b..44ffce061a7c 100644 --- a/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h +++ b/components/esp_hw_support/port/esp32c6/private_include/pmu_param.h @@ -35,6 +35,7 @@ extern "C" { #define PMU_LP_DRVB_LIGHTSLEEP 0 #define PMU_HP_XPD_LIGHTSLEEP 1 +#define PMU_DBG_ATTEN_LIGHTSLEEP_NODROP 0 #define PMU_DBG_ATTEN_LIGHTSLEEP_DEFAULT 0 #define PMU_HP_DBIAS_LIGHTSLEEP_0V6_DEFAULT 1 #define PMU_LP_DBIAS_LIGHTSLEEP_0V7_DEFAULT 12 diff --git a/components/esp_hw_support/port/esp32h2/pmu_sleep.c b/components/esp_hw_support/port/esp32h2/pmu_sleep.c index 5c2b902523e9..a59e81f1ecc4 100644 --- a/components/esp_hw_support/port/esp32h2/pmu_sleep.c +++ b/components/esp_hw_support/port/esp32h2/pmu_sleep.c @@ -164,6 +164,9 @@ const pmu_sleep_config_t* pmu_sleep_config_default( analog_default.lp_sys[LP(SLEEP)].analog.pd_cur = PMU_PD_CUR_SLEEP_ON; analog_default.lp_sys[LP(SLEEP)].analog.bias_sleep = PMU_BIASSLP_SLEEP_ON; analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_act_lp_dbias(); + } else if (!(pd_flags & PMU_SLEEP_PD_RC_FAST)) { + analog_default.hp_sys.analog.dbias = get_act_hp_dbias(); + analog_default.lp_sys[LP(SLEEP)].analog.dbias = get_act_lp_dbias(); } config->analog = analog_default; } diff --git a/components/esp_netif/include/esp_netif_sntp.h b/components/esp_netif/include/esp_netif_sntp.h index 87f1245d5adb..51d7e42bd419 100644 --- a/components/esp_netif/include/esp_netif_sntp.h +++ b/components/esp_netif/include/esp_netif_sntp.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -107,6 +107,17 @@ void esp_netif_sntp_deinit(void); */ esp_err_t esp_netif_sntp_sync_wait(TickType_t tout); +/** + * @brief Returns SNTP server's reachability shift register as described in RFC 5905. + * + * @param index Index of the SERVER + * @param reachability reachability shift register + * @return ESP_OK on success, + * ESP_ERR_INVALID_STATE if SNTP not initialized + * ESP_ERR_INVALID_ARG if invalid arguments + */ +esp_err_t esp_netif_sntp_reachability(unsigned int index, unsigned int *reachability); + /** * @} */ diff --git a/components/esp_netif/lwip/esp_netif_sntp.c b/components/esp_netif/lwip/esp_netif_sntp.c index 1aadcbef693c..1a7da5e44245 100644 --- a/components/esp_netif/lwip/esp_netif_sntp.c +++ b/components/esp_netif/lwip/esp_netif_sntp.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -91,6 +91,7 @@ void esp_netif_sntp_renew_servers(void *handler_args, esp_event_base_t base, int esp_err_t esp_netif_sntp_init(const esp_sntp_config_t * config) { esp_err_t ret = ESP_OK; + ESP_RETURN_ON_FALSE(s_storage == NULL, ESP_ERR_INVALID_STATE, TAG, "esp_netif_sntp already initialized"); s_storage = calloc(1, sizeof(sntp_storage_t) + // allocate space for servers only if we are supposed to refresh the settings (config->renew_servers_after_new_IP ? config->num_of_servers * sizeof(char*) : 0)); ESP_GOTO_ON_FALSE(s_storage != NULL, ESP_ERR_NO_MEM, err, TAG, "Failed to allocate SNTP storage"); @@ -177,3 +178,15 @@ esp_err_t esp_netif_sntp_start(void) { return esp_netif_tcpip_exec(sntp_start_api, NULL); } + +esp_err_t esp_netif_sntp_reachability(unsigned int index, unsigned int *reachability) +{ + if (index >= SNTP_MAX_SERVERS || reachability == NULL) { + return ESP_ERR_INVALID_ARG; + } + if (s_storage == NULL || sntp_enabled() == 0) { + return ESP_ERR_INVALID_STATE; + } + *reachability = sntp_getreachability(index); + return ESP_OK; +} diff --git a/components/esp_netif/test_apps/test_app_esp_netif/main/esp_netif_test.c b/components/esp_netif/test_apps/test_app_esp_netif/main/esp_netif_test.c index 472a8de7adf4..84705bc784e3 100644 --- a/components/esp_netif/test_apps/test_app_esp_netif/main/esp_netif_test.c +++ b/components/esp_netif/test_apps/test_app_esp_netif/main/esp_netif_test.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Unlicense OR CC0-1.0 */ @@ -48,7 +48,20 @@ TEST(esp_netif, init_and_destroy_sntp) { esp_sntp_config_t config = ESP_NETIF_SNTP_DEFAULT_CONFIG("127.0.0.1"); config.start = false; - esp_netif_sntp_init(&config); + TEST_ESP_OK(esp_netif_sntp_init(&config)); + // Cannot initialize multiple times + TEST_ASSERT_NOT_EQUAL(ESP_OK, esp_netif_sntp_init(&config)); + // Try again to see that the state didn't change + TEST_ASSERT_NOT_EQUAL(ESP_OK, esp_netif_sntp_init(&config)); + esp_netif_sntp_deinit(); + + // Can initialize again once it's destroyed + TEST_ESP_OK(esp_netif_sntp_init(&config)); + + // Test the reachability API + size_t reachability = 0; + // Invalid state is expected since SNTP service didn't start + TEST_ASSERT_EQUAL(ESP_ERR_INVALID_STATE, esp_netif_sntp_reachability(0, &reachability)); esp_netif_sntp_deinit(); } diff --git a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld index 192840318dba..a3ac43639a71 100644 --- a/components/esp_rom/esp32c2/ld/esp32c2.rom.ld +++ b/components/esp_rom/esp32c2/ld/esp32c2.rom.ld @@ -1503,7 +1503,7 @@ mac_tx_set_plcp2 = 0x40001b68; /* pm_check_state = 0x40001b6c; */ pm_disable_dream_timer = 0x40001b70; pm_disable_sleep_delay_timer = 0x40001b74; -pm_dream = 0x40001b78; +/*pm_dream = 0x40001b78;*/ pm_mac_wakeup = 0x40001b7c; pm_mac_sleep = 0x40001b80; pm_enable_active_timer = 0x40001b84; @@ -1684,7 +1684,7 @@ hal_disable_sta_tbtt = 0x40001e3c; ppCalTxopDur = 0x40001e40; wDev_IndicateCtrlFrame = 0x40001e44; hal_enable_sta_tbtt = 0x40001e48; -hal_set_sta_tbtt = 0x40001e4c; +/*hal_set_sta_tbtt = 0x40001e4c;*/ /* pm_update_next_tbtt = 0x40001e50;*/ /* pm_set_sleep_type = 0x40001e54; */ wDev_Rxbuf_Init = 0x40001e58; @@ -1743,7 +1743,7 @@ tsf_hal_set_tbtt_intr_enable = 0x40001f28; tsf_hal_set_tbtt_intr_disable = 0x40001f2c; tsf_hal_set_tbtt_soc_wakeup_enable = 0x40001f30; tsf_hal_set_tbtt_soc_wakeup_disable = 0x40001f34; -tsf_hal_set_tbtt_start_time = 0x40001f38; +/*tsf_hal_set_tbtt_start_time = 0x40001f38;*/ tsf_hal_set_tbtt_early_time = 0x40001f3c; tsf_hal_set_tbtt_interval = 0x40001f40; tsf_hal_get_tbtt_interval = 0x40001f44; diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.eco7.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.eco7.ld index abcacdc62238..9150a4e32ceb 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.eco7.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.eco7.ld @@ -15,7 +15,7 @@ lmacTxFrame = 0x40001630; mac_tx_set_htsig = 0x40001638; mac_tx_set_plcp1 = 0x40001640; pm_check_state = 0x40001648; -pm_on_beacon_rx = 0x4000167c; +/*pm_on_beacon_rx = 0x4000167c;*/ /*pm_parse_beacon = 0x40001688;*/ pm_process_tim = 0x4000168c; pm_rx_beacon_process = 0x40001690; @@ -33,7 +33,7 @@ wDevCheckBlockError = 0x400017b4; wDev_ProcessFiq = 0x400017f0; /*wDev_ProcessRxSucData = 0x400017f4;*/ /*ppProcTxDone = 0x40001804;*/ -pm_tx_data_done_process = 0x40001808; +/*pm_tx_data_done_process = 0x40001808;*/ ppMapWaitTxq = 0x40001810; /*ieee80211_encap_esfbuf = 0x4000185c;*/ /*sta_input = 0x40001870;*/ diff --git a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld index 3217146cdf29..77b4cfbdc6c8 100644 --- a/components/esp_rom/esp32c3/ld/esp32c3.rom.ld +++ b/components/esp_rom/esp32c3/ld/esp32c3.rom.ld @@ -1538,7 +1538,7 @@ mac_tx_set_plcp2 = 0x40001644; /* pm_check_state = 0x40001648; */ pm_disable_dream_timer = 0x4000164c; pm_disable_sleep_delay_timer = 0x40001650; -pm_dream = 0x40001654; +/*pm_dream = 0x40001654;*/ pm_mac_wakeup = 0x40001658; pm_mac_sleep = 0x4000165c; pm_enable_active_timer = 0x40001660; diff --git a/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld b/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld index 78014c5e5937..ce7c53ed8822 100644 --- a/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld +++ b/components/esp_rom/esp32c6/ld/esp32c6.rom.pp.ld @@ -59,7 +59,7 @@ mac_tx_set_plcp2 = 0x40000c6c; /* pm_check_state = 0x40000c70; */ /* pm_disable_dream_timer = 0x40000c74; */ pm_disable_sleep_delay_timer = 0x40000c78; -pm_dream = 0x40000c7c; +/*pm_dream = 0x40000c7c;*/ pm_mac_wakeup = 0x40000c80; pm_mac_sleep = 0x40000c84; //pm_enable_active_timer = 0x40000c88; @@ -274,7 +274,7 @@ tsf_hal_set_tbtt_rf_ctrl_enable = 0x40000fc8; tsf_hal_set_tbtt_rf_ctrl_wait_cycles = 0x40000fcc; tsf_hal_set_tbtt_soc_wakeup_disable = 0x40000fd0; tsf_hal_set_tbtt_soc_wakeup_enable = 0x40000fd4; -tsf_hal_set_tbtt_start_time = 0x40000fd8; +/*tsf_hal_set_tbtt_start_time = 0x40000fd8;*/ tsf_hal_set_time = 0x40000fdc; tsf_hal_set_timer_disable = 0x40000fe0; tsf_hal_set_timer_enable = 0x40000fe4; diff --git a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld index ce26c4e487af..227e94f93447 100644 --- a/components/esp_rom/esp32s3/ld/esp32s3.rom.ld +++ b/components/esp_rom/esp32s3/ld/esp32s3.rom.ld @@ -1839,7 +1839,7 @@ mac_tx_set_plcp2 = 0x4000540c; /* pm_check_state = 0x40005418; */ pm_disable_dream_timer = 0x40005424; pm_disable_sleep_delay_timer = 0x40005430; -pm_dream = 0x4000543c; +/*pm_dream = 0x4000543c;*/ pm_mac_wakeup = 0x40005448; pm_mac_sleep = 0x40005454; pm_enable_active_timer = 0x40005460; diff --git a/components/esp_wifi/esp32/esp_adapter.c b/components/esp_wifi/esp32/esp_adapter.c index e0074195c2da..39e031ac387d 100644 --- a/components/esp_wifi/esp32/esp_adapter.c +++ b/components/esp_wifi/esp32/esp_adapter.c @@ -573,6 +573,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int)) #endif } +static int coex_schm_flexible_period_set_wrapper(uint8_t period) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_set(period); +#else + return 0; +#endif +} + +static uint8_t coex_schm_flexible_period_get_wrapper(void) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_get(); +#else + return 1; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -707,5 +725,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_register_start_cb = coex_register_start_cb_wrapper, ._coex_schm_process_restart = coex_schm_process_restart_wrapper, ._coex_schm_register_cb = coex_schm_register_cb_wrapper, + ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, + ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32c2/esp_adapter.c b/components/esp_wifi/esp32c2/esp_adapter.c index 70a8dbf9245a..22aadef0c216 100644 --- a/components/esp_wifi/esp32c2/esp_adapter.c +++ b/components/esp_wifi/esp32c2/esp_adapter.c @@ -512,6 +512,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int)) #endif } +static int coex_schm_flexible_period_set_wrapper(uint8_t period) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_set(period); +#else + return 0; +#endif +} + +static uint8_t coex_schm_flexible_period_get_wrapper(void) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_get(); +#else + return 1; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -645,5 +663,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_register_start_cb = coex_register_start_cb_wrapper, ._coex_schm_process_restart = coex_schm_process_restart_wrapper, ._coex_schm_register_cb = coex_schm_register_cb_wrapper, + ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, + ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32c3/esp_adapter.c b/components/esp_wifi/esp32c3/esp_adapter.c index d48431ab324a..d08b7467ed40 100644 --- a/components/esp_wifi/esp32c3/esp_adapter.c +++ b/components/esp_wifi/esp32c3/esp_adapter.c @@ -529,6 +529,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int)) #endif } +static int coex_schm_flexible_period_set_wrapper(uint8_t period) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_set(period); +#else + return 0; +#endif +} + +static uint8_t coex_schm_flexible_period_get_wrapper(void) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_get(); +#else + return 1; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -662,5 +680,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_register_start_cb = coex_register_start_cb_wrapper, ._coex_schm_process_restart = coex_schm_process_restart_wrapper, ._coex_schm_register_cb = coex_schm_register_cb_wrapper, + ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, + ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32c6/esp_adapter.c b/components/esp_wifi/esp32c6/esp_adapter.c index f7ae4ec3b645..e6e5cbf7112b 100644 --- a/components/esp_wifi/esp32c6/esp_adapter.c +++ b/components/esp_wifi/esp32c6/esp_adapter.c @@ -518,6 +518,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int)) #endif } +static int coex_schm_flexible_period_set_wrapper(uint8_t period) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_set(period); +#else + return 0; +#endif +} + +static uint8_t coex_schm_flexible_period_get_wrapper(void) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_get(); +#else + return 1; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -667,5 +685,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { #endif ._coex_schm_process_restart = coex_schm_process_restart_wrapper, ._coex_schm_register_cb = coex_schm_register_cb_wrapper, + ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, + ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32s2/esp_adapter.c b/components/esp_wifi/esp32s2/esp_adapter.c index 6e05967e5279..c136d7f700f8 100644 --- a/components/esp_wifi/esp32s2/esp_adapter.c +++ b/components/esp_wifi/esp32s2/esp_adapter.c @@ -568,6 +568,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int)) #endif } +static int coex_schm_flexible_period_set_wrapper(uint8_t period) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_set(period); +#else + return 0; +#endif +} + +static uint8_t coex_schm_flexible_period_get_wrapper(void) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_get(); +#else + return 1; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -701,6 +719,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_register_start_cb = coex_register_start_cb_wrapper, ._coex_schm_process_restart = coex_schm_process_restart_wrapper, ._coex_schm_register_cb = coex_schm_register_cb_wrapper, - + ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, + ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/esp32s3/esp_adapter.c b/components/esp_wifi/esp32s3/esp_adapter.c index 716609ef0034..2ab2fad9c9d0 100644 --- a/components/esp_wifi/esp32s3/esp_adapter.c +++ b/components/esp_wifi/esp32s3/esp_adapter.c @@ -585,6 +585,24 @@ static int coex_schm_register_cb_wrapper(int type, int(*cb)(int)) #endif } +static int coex_schm_flexible_period_set_wrapper(uint8_t period) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_set(period); +#else + return 0; +#endif +} + +static uint8_t coex_schm_flexible_period_get_wrapper(void) +{ +#if CONFIG_ESP_COEX_POWER_MANAGEMENT + return coex_schm_flexible_period_get(); +#else + return 1; +#endif +} + static void IRAM_ATTR esp_empty_wrapper(void) { @@ -719,5 +737,7 @@ wifi_osi_funcs_t g_wifi_osi_funcs = { ._coex_register_start_cb = coex_register_start_cb_wrapper, ._coex_schm_process_restart = coex_schm_process_restart_wrapper, ._coex_schm_register_cb = coex_schm_register_cb_wrapper, + ._coex_schm_flexible_period_set = coex_schm_flexible_period_set_wrapper, + ._coex_schm_flexible_period_get = coex_schm_flexible_period_get_wrapper, ._magic = ESP_WIFI_OS_ADAPTER_MAGIC, }; diff --git a/components/esp_wifi/include/esp_private/wifi_os_adapter.h b/components/esp_wifi/include/esp_private/wifi_os_adapter.h index dcb03ab40f2d..0016eb2ba07e 100644 --- a/components/esp_wifi/include/esp_private/wifi_os_adapter.h +++ b/components/esp_wifi/include/esp_private/wifi_os_adapter.h @@ -153,6 +153,8 @@ typedef struct { void (* _regdma_link_set_write_wait_content)(void *, uint32_t, uint32_t); void * (* _sleep_retention_find_link_by_id)(int); #endif + int (*_coex_schm_flexible_period_set)(uint8_t); + uint8_t (*_coex_schm_flexible_period_get)(void); int32_t _magic; } wifi_osi_funcs_t; diff --git a/components/esp_wifi/include/esp_wifi.h b/components/esp_wifi/include/esp_wifi.h index 27c71fa6957a..6d49a1de9f5e 100644 --- a/components/esp_wifi/include/esp_wifi.h +++ b/components/esp_wifi/include/esp_wifi.h @@ -1493,6 +1493,21 @@ esp_err_t esp_wifi_set_dynamic_cs(bool enabled); */ esp_err_t esp_wifi_sta_get_rssi(int *rssi); +#if CONFIG_ESP_COEX_POWER_MANAGEMENT +/** + * @brief Enable Wi-Fi coexistence power management + * + * @attention This API should be called after esp_wifi_init(). + * + * @param enabled Wi-Fi coexistence power management is enabled or not. + * + * @return + * - ESP_OK: succeed + * - others: failed + */ +esp_err_t esp_wifi_coex_pwr_configure(bool enabled); +#endif + #ifdef __cplusplus } #endif diff --git a/components/esp_wifi/lib b/components/esp_wifi/lib index 512bf60b7b5f..73422634cda0 160000 --- a/components/esp_wifi/lib +++ b/components/esp_wifi/lib @@ -1 +1 @@ -Subproject commit 512bf60b7b5f77e86a29801968f463a5581a9244 +Subproject commit 73422634cda038c830c39509487a5fcc6a33b46f diff --git a/components/heap/CMakeLists.txt b/components/heap/CMakeLists.txt index 523e0b0a3eac..33b822ee5df3 100644 --- a/components/heap/CMakeLists.txt +++ b/components/heap/CMakeLists.txt @@ -8,6 +8,7 @@ if(${target} STREQUAL "linux") endif() set(srcs + "heap_caps_base.c" "heap_caps.c" "heap_caps_init.c" "multi_heap.c") @@ -50,15 +51,10 @@ idf_component_register(SRCS "${srcs}" if(CONFIG_HEAP_TRACING) set(WRAP_FUNCTIONS - calloc - malloc - free - realloc - heap_caps_malloc - heap_caps_free - heap_caps_realloc - heap_caps_malloc_default - heap_caps_realloc_default) + heap_caps_realloc_base + heap_caps_malloc_base + heap_caps_aligned_alloc_base + heap_caps_free) foreach(wrap ${WRAP_FUNCTIONS}) target_link_libraries(${COMPONENT_LIB} INTERFACE "-Wl,--wrap=${wrap}") diff --git a/components/heap/heap_caps.c b/components/heap/heap_caps.c index 7ab6798a5cbf..1a9cd28bdce6 100644 --- a/components/heap/heap_caps.c +++ b/components/heap/heap_caps.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -15,22 +15,6 @@ #include "heap_private.h" #include "esp_system.h" -#ifdef CONFIG_HEAP_USE_HOOKS -#define CALL_HOOK(hook, ...) { \ - if (hook != NULL) { \ - hook(__VA_ARGS__); \ - } \ -} -#else -#define CALL_HOOK(hook, ...) {} -#endif - -/* Forward declaration for base function, put in IRAM. - * These functions don't check for errors after trying to allocate memory. */ -static void *heap_caps_realloc_base( void *ptr, size_t size, uint32_t caps ); -static void *heap_caps_calloc_base( size_t n, size_t size, uint32_t caps ); -static void *heap_caps_malloc_base( size_t size, uint32_t caps ); - /* This file, combined with a region allocator that supports multiple heaps, solves the problem that the ESP32 has RAM that's slightly heterogeneous. Some RAM can be byte-accessed, some allows only 32-bit accesses, some can execute memory, @@ -62,28 +46,6 @@ HEAP_IRAM_ATTR static void fmt_abort_str(char dest[48], size_t size, uint32_t ca } #endif -/* - This takes a memory chunk in a region that can be addressed as both DRAM as well as IRAM. It will convert it to - IRAM in such a way that it can be later freed. It assumes both the address as well as the length to be word-aligned. - It returns a region that's 1 word smaller than the region given because it stores the original Dram address there. -*/ -HEAP_IRAM_ATTR static void *dram_alloc_to_iram_addr(void *addr, size_t len) -{ - uintptr_t dstart = (uintptr_t)addr; //First word - uintptr_t dend __attribute__((unused)) = dstart + len - 4; //Last word - assert(esp_ptr_in_diram_dram((void *)dstart)); - assert(esp_ptr_in_diram_dram((void *)dend)); - assert((dstart & 3) == 0); - assert((dend & 3) == 0); -#if SOC_DIRAM_INVERTED // We want the word before the result to hold the DRAM address - uint32_t *iptr = esp_ptr_diram_dram_to_iram((void *)dend); -#else - uint32_t *iptr = esp_ptr_diram_dram_to_iram((void *)dstart); -#endif - *iptr = dstart; - return iptr + 1; -} - HEAP_IRAM_ATTR NOINLINE_ATTR static void heap_caps_alloc_failed(size_t requested_size, uint32_t caps, const char *function_name) { if (alloc_failed_callback) { @@ -114,91 +76,11 @@ bool heap_caps_match(const heap_t *heap, uint32_t caps) } -/* -This function should not be called directly as it does not -check for failure / call heap_caps_alloc_failed() -*/ -HEAP_IRAM_ATTR static void *heap_caps_malloc_base( size_t size, uint32_t caps) -{ - void *ret = NULL; - - // remove block owner size to HEAP_SIZE_MAX rather than adding the block owner size - // to size to prevent overflows. - if (size == 0 || size > MULTI_HEAP_REMOVE_BLOCK_OWNER_SIZE(HEAP_SIZE_MAX) ) { - // Avoids int overflow when adding small numbers to size, or - // calculating 'end' from start+size, by limiting 'size' to the possible range - return NULL; - } - - if (caps & MALLOC_CAP_EXEC) { - //MALLOC_CAP_EXEC forces an alloc from IRAM. There is a region which has both this as well as the following - //caps, but the following caps are not possible for IRAM. Thus, the combination is impossible and we return - //NULL directly, even although our heap capabilities (based on soc_memory_tags & soc_memory_regions) would - //indicate there is a tag for this. - if ((caps & MALLOC_CAP_8BIT) || (caps & MALLOC_CAP_DMA)) { - return NULL; - } - caps |= MALLOC_CAP_32BIT; // IRAM is 32-bit accessible RAM - } - - if (caps & MALLOC_CAP_32BIT) { - /* 32-bit accessible RAM should allocated in 4 byte aligned sizes - * (Future versions of ESP-IDF should possibly fail if an invalid size is requested) - */ - size = (size + 3) & (~3); // int overflow checked above - } - - for (int prio = 0; prio < SOC_MEMORY_TYPE_NO_PRIOS; prio++) { - //Iterate over heaps and check capabilities at this priority - heap_t *heap; - SLIST_FOREACH(heap, ®istered_heaps, next) { - if (heap->heap == NULL) { - continue; - } - if ((heap->caps[prio] & caps) != 0) { - //Heap has at least one of the caps requested. If caps has other bits set that this prio - //doesn't cover, see if they're available in other prios. - if ((get_all_caps(heap) & caps) == caps) { - //This heap can satisfy all the requested capabilities. See if we can grab some memory using it. - // If MALLOC_CAP_EXEC is requested but the DRAM and IRAM are on the same addresses (like on esp32c6) - // proceed as for a default allocation. - if ((caps & MALLOC_CAP_EXEC) && !esp_dram_match_iram() && esp_ptr_in_diram_dram((void *)heap->start)) { - //This is special, insofar that what we're going to get back is a DRAM address. If so, - //we need to 'invert' it (lowest address in DRAM == highest address in IRAM and vice-versa) and - //add a pointer to the DRAM equivalent before the address we're going to return. - ret = multi_heap_malloc(heap->heap, MULTI_HEAP_ADD_BLOCK_OWNER_SIZE(size) + 4); // int overflow checked above - if (ret != NULL) { - MULTI_HEAP_SET_BLOCK_OWNER(ret); - ret = MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ret); - uint32_t *iptr = dram_alloc_to_iram_addr(ret, size + 4); // int overflow checked above - CALL_HOOK(esp_heap_trace_alloc_hook, iptr, size, caps); - return iptr; - } - } else { - //Just try to alloc, nothing special. - ret = multi_heap_malloc(heap->heap, MULTI_HEAP_ADD_BLOCK_OWNER_SIZE(size)); - if (ret != NULL) { - MULTI_HEAP_SET_BLOCK_OWNER(ret); - ret = MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ret); - CALL_HOOK(esp_heap_trace_alloc_hook, ret, size, caps); - return ret; - } - } - } - } - } - } - - //Nothing usable found. - return NULL; -} - - /* Routine to allocate a bit of memory with certain capabilities. caps is a bitfield of MALLOC_CAP_* bits. */ -HEAP_IRAM_ATTR void *heap_caps_malloc( size_t size, uint32_t caps){ - +HEAP_IRAM_ATTR void *heap_caps_malloc( size_t size, uint32_t caps) +{ void* ptr = heap_caps_malloc_base(size, caps); @@ -356,137 +238,6 @@ HEAP_IRAM_ATTR void *heap_caps_calloc_prefer( size_t n, size_t size, size_t num, return r; } -/* Find the heap which belongs to ptr, or return NULL if it's - not in any heap. - - (This confirms if ptr is inside the heap's region, doesn't confirm if 'ptr' - is an allocated block or is some other random address inside the heap.) -*/ -HEAP_IRAM_ATTR static heap_t *find_containing_heap(void *ptr ) -{ - intptr_t p = (intptr_t)ptr; - heap_t *heap; - SLIST_FOREACH(heap, ®istered_heaps, next) { - if (heap->heap != NULL && p >= heap->start && p < heap->end) { - return heap; - } - } - return NULL; -} - -HEAP_IRAM_ATTR void heap_caps_free( void *ptr) -{ - if (ptr == NULL) { - return; - } - - if (esp_ptr_in_diram_iram(ptr)) { - //Memory allocated here is actually allocated in the DRAM alias region and - //cannot be de-allocated as usual. dram_alloc_to_iram_addr stores a pointer to - //the equivalent DRAM address, though; free that. - uint32_t *dramAddrPtr = (uint32_t *)ptr; - ptr = (void *)dramAddrPtr[-1]; - } - void *block_owner_ptr = MULTI_HEAP_REMOVE_BLOCK_OWNER_OFFSET(ptr); - heap_t *heap = find_containing_heap(block_owner_ptr); - assert(heap != NULL && "free() target pointer is outside heap areas"); - multi_heap_free(heap->heap, block_owner_ptr); - - CALL_HOOK(esp_heap_trace_free_hook, ptr); -} - -/* -This function should not be called directly as it does not -check for failure / call heap_caps_alloc_failed() -*/ -HEAP_IRAM_ATTR static void *heap_caps_realloc_base( void *ptr, size_t size, uint32_t caps) -{ - bool ptr_in_diram_case = false; - heap_t *heap = NULL; - void *dram_ptr = NULL; - - if (ptr == NULL) { - return heap_caps_malloc_base(size, caps); - } - - if (size == 0) { - heap_caps_free(ptr); - return NULL; - } - - // remove block owner size to HEAP_SIZE_MAX rather than adding the block owner size - // to size to prevent overflows. - if (size > MULTI_HEAP_REMOVE_BLOCK_OWNER_SIZE(HEAP_SIZE_MAX)) { - return NULL; - } - - //The pointer to memory may be aliased, we need to - //recover the corresponding address before to manage a new allocation: - if(esp_ptr_in_diram_iram((void *)ptr)) { - uint32_t *dram_addr = (uint32_t *)ptr; - dram_ptr = (void *)dram_addr[-1]; - dram_ptr = MULTI_HEAP_REMOVE_BLOCK_OWNER_OFFSET(dram_ptr); - - heap = find_containing_heap(dram_ptr); - assert(heap != NULL && "realloc() pointer is outside heap areas"); - - //with pointers that reside on diram space, we avoid using - //the realloc implementation due to address translation issues, - //instead force a malloc/copy/free - ptr_in_diram_case = true; - - } else { - heap = find_containing_heap(ptr); - assert(heap != NULL && "realloc() pointer is outside heap areas"); - } - - // shift ptr by block owner offset. Since the ptr returned to the user - // does not include the block owner bytes (that are located at the - // beginning of the allocated memory) we have to add them back before - // processing the realloc. - ptr = MULTI_HEAP_REMOVE_BLOCK_OWNER_OFFSET(ptr); - - // are the existing heap's capabilities compatible with the - // requested ones? - bool compatible_caps = (caps & get_all_caps(heap)) == caps; - - if (compatible_caps && !ptr_in_diram_case) { - // try to reallocate this memory within the same heap - // (which will resize the block if it can) - void *r = multi_heap_realloc(heap->heap, ptr, MULTI_HEAP_ADD_BLOCK_OWNER_SIZE(size)); - if (r != NULL) { - MULTI_HEAP_SET_BLOCK_OWNER(r); - r = MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(r); - CALL_HOOK(esp_heap_trace_alloc_hook, r, size, caps); - return r; - } - } - - // if we couldn't do that, try to see if we can reallocate - // in a different heap with requested capabilities. - void *new_p = heap_caps_malloc_base(size, caps); - if (new_p != NULL) { - size_t old_size = 0; - - //If we're dealing with aliased ptr, information regarding its containing - //heap can only be obtained with translated address. - if(ptr_in_diram_case) { - old_size = multi_heap_get_allocated_size(heap->heap, dram_ptr); - } else { - old_size = multi_heap_get_allocated_size(heap->heap, ptr); - } - - assert(old_size > 0); - // do not copy the block owner bytes - memcpy(new_p, MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ptr), MIN(size, old_size)); - // add the block owner bytes to ptr since they are removed in heap_caps_free - heap_caps_free(MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ptr)); - return new_p; - } - - return NULL; -} - HEAP_IRAM_ATTR void *heap_caps_realloc( void *ptr, size_t size, uint32_t caps) { ptr = heap_caps_realloc_base(ptr, size, caps); @@ -499,26 +250,6 @@ HEAP_IRAM_ATTR void *heap_caps_realloc( void *ptr, size_t size, uint32_t caps) return ptr; } -/* -This function should not be called directly as it does not -check for failure / call heap_caps_alloc_failed() -*/ -HEAP_IRAM_ATTR static void *heap_caps_calloc_base( size_t n, size_t size, uint32_t caps) -{ - void *result; - size_t size_bytes; - - if (__builtin_mul_overflow(n, size, &size_bytes)) { - return NULL; - } - - result = heap_caps_malloc_base(size_bytes, caps); - if (result != NULL) { - memset(result, 0, size_bytes); - } - return result; -} - HEAP_IRAM_ATTR void *heap_caps_calloc( size_t n, size_t size, uint32_t caps) { void* ptr = heap_caps_calloc_base(n, size, caps); @@ -680,8 +411,6 @@ size_t heap_caps_get_allocated_size( void *ptr ) HEAP_IRAM_ATTR void *heap_caps_aligned_alloc(size_t alignment, size_t size, uint32_t caps) { - void *ret = NULL; - if(!alignment) { return NULL; } @@ -703,35 +432,13 @@ HEAP_IRAM_ATTR void *heap_caps_aligned_alloc(size_t alignment, size_t size, uint return NULL; } - for (int prio = 0; prio < SOC_MEMORY_TYPE_NO_PRIOS; prio++) { - //Iterate over heaps and check capabilities at this priority - heap_t *heap; - SLIST_FOREACH(heap, ®istered_heaps, next) { - if (heap->heap == NULL) { - continue; - } - if ((heap->caps[prio] & caps) != 0) { - //Heap has at least one of the caps requested. If caps has other bits set that this prio - //doesn't cover, see if they're available in other prios. - if ((get_all_caps(heap) & caps) == caps) { - // Just try to alloc, nothing special. Provide the size of the block owner - // as an offset to prevent a miscalculation of the alignment. - ret = multi_heap_aligned_alloc_offs(heap->heap, MULTI_HEAP_ADD_BLOCK_OWNER_SIZE(size), alignment, MULTI_HEAP_BLOCK_OWNER_SIZE()); - if (ret != NULL) { - MULTI_HEAP_SET_BLOCK_OWNER(ret); - ret = MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ret); - CALL_HOOK(esp_heap_trace_alloc_hook, ret, size, caps); - return ret; - } - } - } - } - } + void *ret = heap_caps_aligned_alloc_base(alignment, size, caps); - heap_caps_alloc_failed(size, caps, __func__); + if (ret == NULL) { + heap_caps_alloc_failed(size, caps, __func__); + } - //Nothing usable found. - return NULL; + return ret; } HEAP_IRAM_ATTR void heap_caps_aligned_free(void *ptr) diff --git a/components/heap/heap_caps_base.c b/components/heap/heap_caps_base.c new file mode 100644 index 000000000000..a4598785d9d8 --- /dev/null +++ b/components/heap/heap_caps_base.c @@ -0,0 +1,289 @@ +/* + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD + * + * SPDX-License-Identifier: Apache-2.0 + */ +#include +#include +#include +#include +#include +#include "esp_attr.h" +#include "multi_heap.h" +#include "esp_log.h" +#include "heap_private.h" + +#ifdef CONFIG_HEAP_USE_HOOKS +#define CALL_HOOK(hook, ...) { \ + if (hook != NULL) { \ + hook(__VA_ARGS__); \ + } \ +} +#else +#define CALL_HOOK(hook, ...) {} +#endif + +/* + This takes a memory chunk in a region that can be addressed as both DRAM as well as IRAM. It will convert it to + IRAM in such a way that it can be later freed. It assumes both the address as well as the length to be word-aligned. + It returns a region that's 1 word smaller than the region given because it stores the original Dram address there. +*/ +HEAP_IRAM_ATTR static void *dram_alloc_to_iram_addr(void *addr, size_t len) +{ + uintptr_t dstart = (uintptr_t)addr; //First word + uintptr_t dend __attribute__((unused)) = dstart + len - 4; //Last word + assert(esp_ptr_in_diram_dram((void *)dstart)); + assert(esp_ptr_in_diram_dram((void *)dend)); + assert((dstart & 3) == 0); + assert((dend & 3) == 0); +#if SOC_DIRAM_INVERTED // We want the word before the result to hold the DRAM address + uint32_t *iptr = esp_ptr_diram_dram_to_iram((void *)dend); +#else + uint32_t *iptr = esp_ptr_diram_dram_to_iram((void *)dstart); +#endif + *iptr = dstart; + return iptr + 1; +} + +HEAP_IRAM_ATTR void heap_caps_free( void *ptr) +{ + if (ptr == NULL) { + return; + } + + if (esp_ptr_in_diram_iram(ptr)) { + //Memory allocated here is actually allocated in the DRAM alias region and + //cannot be de-allocated as usual. dram_alloc_to_iram_addr stores a pointer to + //the equivalent DRAM address, though; free that. + uint32_t *dramAddrPtr = (uint32_t *)ptr; + ptr = (void *)dramAddrPtr[-1]; + } + void *block_owner_ptr = MULTI_HEAP_REMOVE_BLOCK_OWNER_OFFSET(ptr); + heap_t *heap = find_containing_heap(block_owner_ptr); + assert(heap != NULL && "free() target pointer is outside heap areas"); + multi_heap_free(heap->heap, block_owner_ptr); + + CALL_HOOK(esp_heap_trace_free_hook, ptr); +} + +/* +This function should not be called directly as it does not +check for failure / call heap_caps_alloc_failed() +*/ +HEAP_IRAM_ATTR NOINLINE_ATTR void *heap_caps_malloc_base( size_t size, uint32_t caps) +{ + void *ret = NULL; + + // remove block owner size to HEAP_SIZE_MAX rather than adding the block owner size + // to size to prevent overflows. + if (size == 0 || size > MULTI_HEAP_REMOVE_BLOCK_OWNER_SIZE(HEAP_SIZE_MAX) ) { + // Avoids int overflow when adding small numbers to size, or + // calculating 'end' from start+size, by limiting 'size' to the possible range + return NULL; + } + + if (caps & MALLOC_CAP_EXEC) { + //MALLOC_CAP_EXEC forces an alloc from IRAM. There is a region which has both this as well as the following + //caps, but the following caps are not possible for IRAM. Thus, the combination is impossible and we return + //NULL directly, even although our heap capabilities (based on soc_memory_tags & soc_memory_regions) would + //indicate there is a tag for this. + if ((caps & MALLOC_CAP_8BIT) || (caps & MALLOC_CAP_DMA)) { + return NULL; + } + caps |= MALLOC_CAP_32BIT; // IRAM is 32-bit accessible RAM + } + + if (caps & MALLOC_CAP_32BIT) { + /* 32-bit accessible RAM should allocated in 4 byte aligned sizes + * (Future versions of ESP-IDF should possibly fail if an invalid size is requested) + */ + size = (size + 3) & (~3); // int overflow checked above + } + + for (int prio = 0; prio < SOC_MEMORY_TYPE_NO_PRIOS; prio++) { + //Iterate over heaps and check capabilities at this priority + heap_t *heap; + SLIST_FOREACH(heap, ®istered_heaps, next) { + if (heap->heap == NULL) { + continue; + } + if ((heap->caps[prio] & caps) != 0) { + //Heap has at least one of the caps requested. If caps has other bits set that this prio + //doesn't cover, see if they're available in other prios. + if ((get_all_caps(heap) & caps) == caps) { + //This heap can satisfy all the requested capabilities. See if we can grab some memory using it. + // If MALLOC_CAP_EXEC is requested but the DRAM and IRAM are on the same addresses (like on esp32c6) + // proceed as for a default allocation. + if ((caps & MALLOC_CAP_EXEC) && !esp_dram_match_iram() && esp_ptr_in_diram_dram((void *)heap->start)) { + //This is special, insofar that what we're going to get back is a DRAM address. If so, + //we need to 'invert' it (lowest address in DRAM == highest address in IRAM and vice-versa) and + //add a pointer to the DRAM equivalent before the address we're going to return. + ret = multi_heap_malloc(heap->heap, MULTI_HEAP_ADD_BLOCK_OWNER_SIZE(size) + 4); // int overflow checked above + if (ret != NULL) { + MULTI_HEAP_SET_BLOCK_OWNER(ret); + ret = MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ret); + uint32_t *iptr = dram_alloc_to_iram_addr(ret, size + 4); // int overflow checked above + CALL_HOOK(esp_heap_trace_alloc_hook, iptr, size, caps); + return iptr; + } + } else { + //Just try to alloc, nothing special. + ret = multi_heap_malloc(heap->heap, MULTI_HEAP_ADD_BLOCK_OWNER_SIZE(size)); + if (ret != NULL) { + MULTI_HEAP_SET_BLOCK_OWNER(ret); + ret = MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ret); + CALL_HOOK(esp_heap_trace_alloc_hook, ret, size, caps); + return ret; + } + } + } + } + } + } + + //Nothing usable found. + return NULL; +} + +/* +This function should not be called directly as it does not +check for failure / call heap_caps_alloc_failed() +*/ +HEAP_IRAM_ATTR NOINLINE_ATTR void *heap_caps_realloc_base( void *ptr, size_t size, uint32_t caps) +{ + bool ptr_in_diram_case = false; + heap_t *heap = NULL; + void *dram_ptr = NULL; + + if (ptr == NULL) { + return heap_caps_malloc_base(size, caps); + } + + if (size == 0) { + heap_caps_free(ptr); + return NULL; + } + + // remove block owner size to HEAP_SIZE_MAX rather than adding the block owner size + // to size to prevent overflows. + if (size > MULTI_HEAP_REMOVE_BLOCK_OWNER_SIZE(HEAP_SIZE_MAX)) { + return NULL; + } + + //The pointer to memory may be aliased, we need to + //recover the corresponding address before to manage a new allocation: + if(esp_ptr_in_diram_iram((void *)ptr)) { + uint32_t *dram_addr = (uint32_t *)ptr; + dram_ptr = (void *)dram_addr[-1]; + dram_ptr = MULTI_HEAP_REMOVE_BLOCK_OWNER_OFFSET(dram_ptr); + + heap = find_containing_heap(dram_ptr); + assert(heap != NULL && "realloc() pointer is outside heap areas"); + + //with pointers that reside on diram space, we avoid using + //the realloc implementation due to address translation issues, + //instead force a malloc/copy/free + ptr_in_diram_case = true; + + } else { + heap = find_containing_heap(ptr); + assert(heap != NULL && "realloc() pointer is outside heap areas"); + } + + // shift ptr by block owner offset. Since the ptr returned to the user + // does not include the block owner bytes (that are located at the + // beginning of the allocated memory) we have to add them back before + // processing the realloc. + ptr = MULTI_HEAP_REMOVE_BLOCK_OWNER_OFFSET(ptr); + + // are the existing heap's capabilities compatible with the + // requested ones? + bool compatible_caps = (caps & get_all_caps(heap)) == caps; + + if (compatible_caps && !ptr_in_diram_case) { + // try to reallocate this memory within the same heap + // (which will resize the block if it can) + void *r = multi_heap_realloc(heap->heap, ptr, MULTI_HEAP_ADD_BLOCK_OWNER_SIZE(size)); + if (r != NULL) { + MULTI_HEAP_SET_BLOCK_OWNER(r); + r = MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(r); + CALL_HOOK(esp_heap_trace_alloc_hook, r, size, caps); + return r; + } + } + + // if we couldn't do that, try to see if we can reallocate + // in a different heap with requested capabilities. + void *new_p = heap_caps_malloc_base(size, caps); + if (new_p != NULL) { + size_t old_size = 0; + + //If we're dealing with aliased ptr, information regarding its containing + //heap can only be obtained with translated address. + if(ptr_in_diram_case) { + old_size = multi_heap_get_allocated_size(heap->heap, dram_ptr); + } else { + old_size = multi_heap_get_allocated_size(heap->heap, ptr); + } + + assert(old_size > 0); + // do not copy the block owner bytes + memcpy(new_p, MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ptr), MIN(size, old_size)); + // add the block owner bytes to ptr since they are removed in heap_caps_free + heap_caps_free(MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ptr)); + return new_p; + } + + return NULL; +} + +/* +This function should not be called directly as it does not +check for failure / call heap_caps_alloc_failed() +*/ +HEAP_IRAM_ATTR void *heap_caps_calloc_base( size_t n, size_t size, uint32_t caps) +{ + void *result; + size_t size_bytes; + + if (__builtin_mul_overflow(n, size, &size_bytes)) { + return NULL; + } + + result = heap_caps_malloc_base(size_bytes, caps); + if (result != NULL) { + memset(result, 0, size_bytes); + } + return result; +} + +HEAP_IRAM_ATTR void *heap_caps_aligned_alloc_base(size_t alignment, size_t size, uint32_t caps) +{ + for (int prio = 0; prio < SOC_MEMORY_TYPE_NO_PRIOS; prio++) { + //Iterate over heaps and check capabilities at this priority + heap_t *heap; + SLIST_FOREACH(heap, ®istered_heaps, next) { + if (heap->heap == NULL) { + continue; + } + if ((heap->caps[prio] & caps) != 0) { + //Heap has at least one of the caps requested. If caps has other bits set that this prio + //doesn't cover, see if they're available in other prios. + if ((get_all_caps(heap) & caps) == caps) { + // Just try to alloc, nothing special. Provide the size of the block owner + // as an offset to prevent a miscalculation of the alignment. + void *ret = multi_heap_aligned_alloc_offs(heap->heap, MULTI_HEAP_ADD_BLOCK_OWNER_SIZE(size), alignment, MULTI_HEAP_BLOCK_OWNER_SIZE()); + if (ret != NULL) { + MULTI_HEAP_SET_BLOCK_OWNER(ret); + ret = MULTI_HEAP_ADD_BLOCK_OWNER_OFFSET(ret); + CALL_HOOK(esp_heap_trace_alloc_hook, ret, size, caps); + return ret; + } + } + } + } + } + + //Nothing usable found. + return NULL; +} diff --git a/components/heap/heap_private.h b/components/heap/heap_private.h index 51b6773ffad2..5b8ad989de9b 100644 --- a/components/heap/heap_private.h +++ b/components/heap/heap_private.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -11,6 +11,7 @@ #include "multi_heap.h" #include "multi_heap_platform.h" #include "sys/queue.h" +#include "esp_attr.h" #ifdef __cplusplus extern "C" { @@ -43,7 +44,7 @@ extern SLIST_HEAD(registered_heap_ll, heap_t_) registered_heaps; bool heap_caps_match(const heap_t *heap, uint32_t caps); /* return all possible capabilities (across all priorities) for a given heap */ -inline static uint32_t get_all_caps(const heap_t *heap) +FORCE_INLINE_ATTR uint32_t get_all_caps(const heap_t *heap) { if (heap->heap == NULL) { return 0; @@ -55,6 +56,24 @@ inline static uint32_t get_all_caps(const heap_t *heap) return all_caps; } +/* Find the heap which belongs to ptr, or return NULL if it's + not in any heap. + + (This confirms if ptr is inside the heap's region, doesn't confirm if 'ptr' + is an allocated block or is some other random address inside the heap.) +*/ +FORCE_INLINE_ATTR heap_t *find_containing_heap(void *ptr ) +{ + intptr_t p = (intptr_t)ptr; + heap_t *heap; + SLIST_FOREACH(heap, ®istered_heaps, next) { + if (heap->heap != NULL && p >= heap->start && p < heap->end) { + return heap; + } + } + return NULL; +} + /* Because we don't want to add _another_ known allocation method to the stack of functions to trace wrt memory tracing, these are declared private. The newlib malloc()/realloc() implementation also calls these, so they are declared @@ -62,7 +81,10 @@ inline static uint32_t get_all_caps(const heap_t *heap) */ void *heap_caps_realloc_default(void *p, size_t size); void *heap_caps_malloc_default(size_t size); - +void *heap_caps_realloc_base(void *ptr, size_t size, uint32_t caps); +void *heap_caps_calloc_base(size_t n, size_t size, uint32_t caps); +void *heap_caps_malloc_base(size_t size, uint32_t caps); +void *heap_caps_aligned_alloc_base(size_t alignment, size_t size, uint32_t caps); #ifdef __cplusplus } diff --git a/components/heap/include/heap_trace.inc b/components/heap/include/heap_trace.inc index 9a8923dee216..232abe6fade4 100644 --- a/components/heap/include/heap_trace.inc +++ b/components/heap/include/heap_trace.inc @@ -96,27 +96,26 @@ static HEAP_IRAM_ATTR __attribute__((noinline)) void get_call_stack(void **calle ESP_STATIC_ASSERT(STACK_DEPTH >= 0 && STACK_DEPTH <= 32, "CONFIG_HEAP_TRACING_STACK_DEPTH must be in range 0-32"); - typedef enum { - TRACE_MALLOC_CAPS, + TRACE_MALLOC_ALIGNED, TRACE_MALLOC_DEFAULT } trace_malloc_mode_t; - -void *__real_heap_caps_malloc(size_t size, uint32_t caps); -void *__real_heap_caps_malloc_default( size_t size ); -void *__real_heap_caps_realloc_default( void *ptr, size_t size ); +void *__real_heap_caps_malloc_base( size_t size, uint32_t caps); +void *__real_heap_caps_realloc_base( void *ptr, size_t size, uint32_t caps); +void *__real_heap_caps_aligned_alloc_base(size_t alignment, size_t size, uint32_t caps); +void __real_heap_caps_free(void *p); /* trace any 'malloc' event */ -static HEAP_IRAM_ATTR __attribute__((noinline)) void *trace_malloc(size_t size, uint32_t caps, trace_malloc_mode_t mode) +static HEAP_IRAM_ATTR __attribute__((noinline)) void *trace_malloc(size_t alignment, size_t size, uint32_t caps, trace_malloc_mode_t mode) { uint32_t ccount = get_ccount(); - void *p; + void *p = NULL; - if ( mode == TRACE_MALLOC_CAPS ) { - p = __real_heap_caps_malloc(size, caps); - } else { //TRACE_MALLOC_DEFAULT - p = __real_heap_caps_malloc_default(size); + if (mode == TRACE_MALLOC_DEFAULT) { + p = __real_heap_caps_malloc_base(size, caps); + } else { + p = __real_heap_caps_aligned_alloc_base(alignment, size, caps); } heap_trace_record_t rec = { @@ -129,22 +128,8 @@ static HEAP_IRAM_ATTR __attribute__((noinline)) void *trace_malloc(size_t size, return p; } -void __real_heap_caps_free(void *p); - -/* trace any 'free' event */ -static HEAP_IRAM_ATTR __attribute__((noinline)) void trace_free(void *p) -{ - void *callers[STACK_DEPTH]; - get_call_stack(callers); - record_free(p, callers); - - __real_heap_caps_free(p); -} - -void * __real_heap_caps_realloc(void *p, size_t size, uint32_t caps); - /* trace any 'realloc' event */ -static HEAP_IRAM_ATTR __attribute__((noinline)) void *trace_realloc(void *p, size_t size, uint32_t caps, trace_malloc_mode_t mode) +static HEAP_IRAM_ATTR __attribute__((noinline)) void *trace_realloc(void *p, size_t size, uint32_t caps) { void *callers[STACK_DEPTH]; uint32_t ccount = get_ccount(); @@ -154,11 +139,8 @@ static HEAP_IRAM_ATTR __attribute__((noinline)) void *trace_realloc(void *p, siz get_call_stack(callers); record_free(p, callers); - if (mode == TRACE_MALLOC_CAPS ) { - r = __real_heap_caps_realloc(p, size, caps); - } else { //TRACE_MALLOC_DEFAULT - r = __real_heap_caps_realloc_default(p, size); - } + r = __real_heap_caps_realloc_base(p, size, caps); + /* realloc with zero size is a free */ if (size != 0) { heap_trace_record_t rec = { @@ -172,53 +154,32 @@ static HEAP_IRAM_ATTR __attribute__((noinline)) void *trace_realloc(void *p, siz return r; } -/* Note: this changes the behaviour of libc malloc/realloc/free a bit, - as they no longer go via the libc functions in ROM. But more or less - the same in the end. */ - -HEAP_IRAM_ATTR void *__wrap_malloc(size_t size) -{ - return trace_malloc(size, 0, TRACE_MALLOC_DEFAULT); -} - -HEAP_IRAM_ATTR void __wrap_free(void *p) -{ - trace_free(p); -} - -HEAP_IRAM_ATTR void *__wrap_realloc(void *p, size_t size) +/* trace any 'free' event */ +static HEAP_IRAM_ATTR __attribute__((noinline)) void trace_free(void *p) { - return trace_realloc(p, size, 0, TRACE_MALLOC_DEFAULT); -} + void *callers[STACK_DEPTH]; + get_call_stack(callers); + record_free(p, callers); -HEAP_IRAM_ATTR void *__wrap_calloc(size_t nmemb, size_t size) -{ - size = size * nmemb; - void *result = trace_malloc(size, 0, TRACE_MALLOC_DEFAULT); - if (result != NULL) { - memset(result, 0, size); - } - return result; + __real_heap_caps_free(p); } -HEAP_IRAM_ATTR void *__wrap_heap_caps_malloc(size_t size, uint32_t caps) -{ - return trace_malloc(size, caps, TRACE_MALLOC_CAPS); +HEAP_IRAM_ATTR void __wrap_heap_caps_free(void *p) { + trace_free(p); } -void __wrap_heap_caps_free(void *p) __attribute__((alias("__wrap_free"))); - -HEAP_IRAM_ATTR void *__wrap_heap_caps_realloc(void *p, size_t size, uint32_t caps) +HEAP_IRAM_ATTR void *__wrap_heap_caps_realloc_base(void *ptr, size_t size, uint32_t caps) { - return trace_realloc(p, size, caps, TRACE_MALLOC_CAPS); + return trace_realloc(ptr, size, caps); } -HEAP_IRAM_ATTR void *__wrap_heap_caps_malloc_default( size_t size ) +HEAP_IRAM_ATTR void *__wrap_heap_caps_malloc_base(size_t size, uint32_t caps) { - return trace_malloc(size, 0, TRACE_MALLOC_DEFAULT); + return trace_malloc(0, size, caps, TRACE_MALLOC_DEFAULT); } -HEAP_IRAM_ATTR void *__wrap_heap_caps_realloc_default( void *ptr, size_t size ) +HEAP_IRAM_ATTR void *__wrap_heap_caps_aligned_alloc_base(size_t alignment, size_t size, uint32_t caps) { - return trace_realloc(ptr, size, 0, TRACE_MALLOC_DEFAULT); + (void)alignment; + return trace_malloc(alignment, size, caps, TRACE_MALLOC_ALIGNED); } diff --git a/components/lwip/apps/sntp/sntp.c b/components/lwip/apps/sntp/sntp.c index 3b8cf283ae1d..8d8fbfbe9010 100644 --- a/components/lwip/apps/sntp/sntp.c +++ b/components/lwip/apps/sntp/sntp.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2022 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -243,6 +243,20 @@ const ip_addr_t* esp_sntp_getserver(u8_t idx) return sntp_getserver(idx); } +uint8_t esp_sntp_getreachability(uint8_t idx) +{ +#if SNTP_MONITOR_SERVER_REACHABILITY + return sntp_getreachability(idx); +#endif + LWIP_ERROR("sntp_getreachability() in not enabled in lwipopts", false, ); + return 0; +} + +esp_sntp_operatingmode_t esp_sntp_getoperatingmode(void) +{ + return (esp_sntp_operatingmode_t)sntp_getoperatingmode(); +} + #if LWIP_DHCP_GET_NTP_SRV static void do_servermode_dhcp(void* ctx) { diff --git a/components/lwip/include/apps/esp_sntp.h b/components/lwip/include/apps/esp_sntp.h index 80d2a8812997..6aad345d00a0 100644 --- a/components/lwip/include/apps/esp_sntp.h +++ b/components/lwip/include/apps/esp_sntp.h @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2015-2021 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2015-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -218,6 +218,20 @@ const ip_addr_t* esp_sntp_getserver(u8_t idx); */ bool esp_sntp_enabled(void); +/** + * @brief Gets the server reachability shift register as described in RFC 5905. + * @param idx Index of the SNTP server + * @return reachability shift register + */ +uint8_t esp_sntp_getreachability(uint8_t idx); + +/** + * @brief Get the configured operating mode + * + * @return operating mode enum + */ +esp_sntp_operatingmode_t esp_sntp_getoperatingmode(void); + #if LWIP_DHCP_GET_NTP_SRV /** * @brief Enable acquiring SNTP server from DHCP @@ -269,6 +283,17 @@ const ip_addr_t* sntp_getserver(u8_t idx) return esp_sntp_getserver(idx); } +static inline uint8_t sntp_getreachability(uint8_t idx) +{ + return esp_sntp_getreachability(idx); +} + +static inline __attribute__((deprecated("use esp_sntp_getoperatingmode() instead"))) +esp_sntp_operatingmode_t sntp_getoperatingmode(void) +{ + return esp_sntp_getoperatingmode(); +} + #endif /* ESP_LWIP_COMPONENT_BUILD */ diff --git a/components/lwip/test_apps/main/lwip_test.c b/components/lwip/test_apps/main/lwip_test.c index 6a34edeb43bf..a738c87611cc 100644 --- a/components/lwip/test_apps/main/lwip_test.c +++ b/components/lwip/test_apps/main/lwip_test.c @@ -1,5 +1,5 @@ /* - * SPDX-FileCopyrightText: 2022-2023 Espressif Systems (Shanghai) CO LTD + * SPDX-FileCopyrightText: 2022-2024 Espressif Systems (Shanghai) CO LTD * * SPDX-License-Identifier: Apache-2.0 */ @@ -294,8 +294,16 @@ void test_sntp_timestamps(int year, bool msb_flag) localtime_r(&now, &timeinfo); TEST_ASSERT_EQUAL(year, 1900 + timeinfo.tm_year); + // Check that the server 0 was reachable + TEST_ASSERT_EQUAL(1, esp_sntp_getreachability(0)); // close the SNTP and the fake server esp_sntp_stop(); + + // Test some other SNTP APIs + TEST_ASSERT_EQUAL(0, esp_sntp_getreachability(0)); + TEST_ASSERT_EQUAL(ESP_SNTP_OPMODE_POLL, esp_sntp_getoperatingmode()); + const ip_addr_t *server_ip = esp_sntp_getserver(0); + TEST_ASSERT_EQUAL(PP_HTONL(IPADDR_LOOPBACK), server_ip->u_addr.ip4.addr); close(sock); } diff --git a/components/vfs/include/esp_vfs.h b/components/vfs/include/esp_vfs.h index ac0029e3f1de..f3358d50761f 100644 --- a/components/vfs/include/esp_vfs.h +++ b/components/vfs/include/esp_vfs.h @@ -336,7 +336,8 @@ esp_err_t esp_vfs_unregister_with_id(esp_vfs_id_t vfs_id); /** * Special function for registering another file descriptor for a VFS registered - * by esp_vfs_register_with_id. + * by esp_vfs_register_with_id. This function should only be used to register + * permanent file descriptors (socket fd) that are not removed after being closed. * * @param vfs_id VFS identificator returned by esp_vfs_register_with_id. * @param fd The registered file descriptor will be written to this address. diff --git a/docs/_static/esp32-c3-devkitc-02-v1-pinout.png b/docs/_static/esp32-c3-devkitc-02-v1-pinout.png index ca1a40782f6d..19386275efe9 100644 Binary files a/docs/_static/esp32-c3-devkitc-02-v1-pinout.png and b/docs/_static/esp32-c3-devkitc-02-v1-pinout.png differ diff --git a/docs/_static/esp32-s2-devkitm-1-v1-annotated-photo.png b/docs/_static/esp32-s2-devkitm-1-v1-annotated-photo.png deleted file mode 100644 index 7da28ae22572..000000000000 Binary files a/docs/_static/esp32-s2-devkitm-1-v1-annotated-photo.png and /dev/null differ diff --git a/docs/_static/esp32-s2-devkitm-1-v1-block-diagram.png b/docs/_static/esp32-s2-devkitm-1-v1-block-diagram.png deleted file mode 100644 index 5cdeade38270..000000000000 Binary files a/docs/_static/esp32-s2-devkitm-1-v1-block-diagram.png and /dev/null differ diff --git a/docs/_static/esp32-s2-devkitm-1-v1-isometric.png b/docs/_static/esp32-s2-devkitm-1-v1-isometric.png deleted file mode 100644 index 4b53ee2ffec4..000000000000 Binary files a/docs/_static/esp32-s2-devkitm-1-v1-isometric.png and /dev/null differ diff --git a/docs/_static/esp32-s2-devkitm-1-v1-pin-layout.png b/docs/_static/esp32-s2-devkitm-1-v1-pin-layout.png deleted file mode 100644 index 7b24a546d340..000000000000 Binary files a/docs/_static/esp32-s2-devkitm-1-v1-pin-layout.png and /dev/null differ diff --git a/docs/_static/esp32-s2-devkitm-1u-v1-annotated-photo.png b/docs/_static/esp32-s2-devkitm-1u-v1-annotated-photo.png deleted file mode 100644 index 3cb77d6ae02d..000000000000 Binary files a/docs/_static/esp32-s2-devkitm-1u-v1-annotated-photo.png and /dev/null differ diff --git a/docs/_static/esp32-s2-devkitm-1u-v1-isometric.png b/docs/_static/esp32-s2-devkitm-1u-v1-isometric.png deleted file mode 100644 index 97d02020fe98..000000000000 Binary files a/docs/_static/esp32-s2-devkitm-1u-v1-isometric.png and /dev/null differ diff --git a/docs/en/api-guides/tools/idf-py.rst b/docs/en/api-guides/tools/idf-py.rst index 95562cb22af1..1a1c851e2ce6 100644 --- a/docs/en/api-guides/tools/idf-py.rst +++ b/docs/en/api-guides/tools/idf-py.rst @@ -83,7 +83,7 @@ Build the Project: ``build`` This command builds the project found in the current directory. This can involve multiple steps: - - Create the build directory if needed. The sub-directory ``build`` is used to hold build output, although this can be changed with the ``-B`` option. + - Create the build directory if needed. The sub-directory "build" is used to hold build output, although this can be changed with the ``-B`` option. - Run CMake_ as necessary to configure the project and generate build files for the main build tool. - Run the main build tool (Ninja_ or `GNU Make`). By default, the build tool is automatically detected but it can be explicitly set by passing the ``-G`` option to ``idf.py``. @@ -228,7 +228,7 @@ Global Options To list all available root level options, run ``idf.py --help``. To list options that are specific for a subcommand, run ``idf.py --help``, e.g., ``idf.py monitor --help``. Here is a list of some useful options: - ``-C `` allows overriding the project directory from the default current working directory. -- ``-B `` allows overriding the build directory from the default ``build`` subdirectory of the project directory. +- ``-B `` allows overriding the build directory from the default "build" subdirectory of the project directory. - ``--ccache`` enables CCache_ when compiling source files if the CCache_ tool is installed. This can dramatically reduce the build time. .. important:: diff --git a/docs/en/api-reference/network/esp_netif.rst b/docs/en/api-reference/network/esp_netif.rst index 2ff9b9f3ff86..d1fff7e5422e 100644 --- a/docs/en/api-reference/network/esp_netif.rst +++ b/docs/en/api-reference/network/esp_netif.rst @@ -264,7 +264,7 @@ You can find a brief introduction to SNTP in general, its initialization code, a This section provides more details about specific use cases of the SNTP service, with statically configured servers, or use the DHCP-provided servers, or both. The workflow is usually very simple: -1) Initialize and configure the service using :cpp:func:`esp_netif_sntp_init()`. +1) Initialize and configure the service using :cpp:func:`esp_netif_sntp_init()`. This operations can only be called once (unless the SNTP service has been destroyed by :cpp:func:`esp_netif_sntp_deinit()`) 2) Start the service via :cpp:func:`esp_netif_sntp_start()`. This step is not needed if we auto-started the service in the previous step (default). It is useful to start the service explicitly after connecting if we want to use the DHCP-obtained NTP servers. Please note, this option needs to be enabled before connecting, but the SNTP service should be started after. 3) Wait for the system time to synchronize using :cpp:func:`esp_netif_sntp_sync_wait()` (only if needed). 4) Stop and destroy the service using :cpp:func:`esp_netif_sntp_deinit()`. diff --git a/docs/en/api-reference/system/sleep_modes.rst b/docs/en/api-reference/system/sleep_modes.rst index a0fd4399871b..0d7fc024109b 100644 --- a/docs/en/api-reference/system/sleep_modes.rst +++ b/docs/en/api-reference/system/sleep_modes.rst @@ -304,6 +304,20 @@ RTC peripherals or RTC memories do not need to be powered on during sleep in thi esp_sleep_pd_config(ESP_PD_DOMAIN_VDDSDIO, ESP_PD_OPTION_ON); + .. only:: SOC_PM_SUPPORT_TOP_PD + + .. note:: + + .. only:: SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP + + In Light-sleep mode, if you set Kconfig option :ref:`CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP`， to continue using :cpp:func:`gpio_wakeup_enable` for GPIO wakeup, you need to first call :cpp:func:`rtc_gpio_init` and :cpp:func:`rtc_gpio_set_direction`, setting the RTCIO to input mode. + + Alternatively，you can use :cpp:func:`esp_deep_sleep_enable_gpio_wakeup` directly in that condition for GPIO wakeup, because the digital IO power domain is being powered off, where the situation is the same as entering Deep-sleep. + + .. only:: not SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP + + In Light-sleep mode, if you set Kconfig option :ref:`CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP`， to continue using :cpp:func:`gpio_wakeup_enable` for GPIO wakeup, you need to first call :cpp:func:`rtc_gpio_init` and :cpp:func:`rtc_gpio_set_direction`, setting the RTCIO to input mode. + .. only:: not SOC_RTCIO_WAKE_SUPPORTED GPIO Wakeup @@ -313,11 +327,13 @@ RTC peripherals or RTC memories do not need to be powered on during sleep in thi Additionally, IOs that are powered by the VDD3P3_RTC power domain can be used to wake up the chip from Deep-sleep. The wakeup pin and wakeup trigger level can be configured by calling :cpp:func:`esp_deep_sleep_enable_gpio_wakeup`. The function will enable the Deep-sleep wakeup for the selected pin. - .. only:: esp32c6 or esp32h2 + .. only:: SOC_PM_SUPPORT_TOP_PD .. note:: - In Light-sleep mode, setting Kconfig option :ref:`CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP` will invalidate GPIO wakeup. + .. only:: SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP + + In Light-sleep mode, if you set Kconfig option :ref:`CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP`， you can use :cpp:func:`esp_deep_sleep_enable_gpio_wakeup` directly for GPIO wakeup, because the digital IO power domain is being powered off, where the situation is the same as entering Deep-sleep. UART Wakeup (Light-sleep Only) ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/docs/en/get-started/index.rst b/docs/en/get-started/index.rst index efa8b3349e15..9bdd4ee1a996 100644 --- a/docs/en/get-started/index.rst +++ b/docs/en/get-started/index.rst @@ -114,7 +114,7 @@ If you have one of {IDF_TARGET_NAME} official development boards listed below, y :maxdepth: 1 ESP32-S2-Saola-1 <../hw-reference/esp32s2/user-guide-saola-1-v1.2> - ESP32-S2-DevKitM-1 <../hw-reference/esp32s2/user-guide-devkitm-1-v1> + ESP32-S2-DevKitM-1 ESP32-S2-DevKitC-1 <../hw-reference/esp32s2/user-guide-s2-devkitc-1> ESP32-S2-Kaluga-Kit <../hw-reference/esp32s2/user-guide-esp32-s2-kaluga-1-kit> diff --git a/docs/en/hw-reference/esp32c3/user-guide-devkitc-02.rst b/docs/en/hw-reference/esp32c3/user-guide-devkitc-02.rst index 61cd114383a5..857ae0bd6cc0 100644 --- a/docs/en/hw-reference/esp32c3/user-guide-devkitc-02.rst +++ b/docs/en/hw-reference/esp32c3/user-guide-devkitc-02.rst @@ -70,7 +70,6 @@ The key components of the board are described in a counter-clockwise direction. * - RGB LED - Addressable RGB LED, driven by GPIO8. - Start Application Development ----------------------------- @@ -105,7 +104,6 @@ If you order a few samples, each ESP32-C3-DevKitC-02 comes in an individual pack For retail orders, please go to https://www.espressif.com/en/contact-us/get-samples. - Wholesale Orders ^^^^^^^^^^^^^^^^ @@ -192,8 +190,8 @@ No. Name Type [1]_ Function 9 RX I/O/T GPIO20, U0RXD 10 TX I/O/T GPIO21, U0TXD 11 G G Ground -12 18 I/O/T GPIO18 -13 19 I/O/T GPIO19 +12 18 I/O/T GPIO18, USB_D- +13 19 I/O/T GPIO19, USB_D+ 14 G G Ground 15 G G Ground === ==== ========== ==================================== @@ -207,7 +205,7 @@ Pin Layout .. figure:: ../../../_static/esp32-c3-devkitc-02-v1-pinout.png :align: center - :scale: 50% + :scale: 45% :alt: ESP32-C3-DevKitC-02 (click to enlarge) :figclass: align-center @@ -233,7 +231,6 @@ Related Documents For further design documentation for the board, please contact us at `sales@espressif.com `_. - .. _ESP32-C3 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-c3_datasheet_en.pdf .. _ESP32-C3-WROOM-02 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-c3-wroom-02_datasheet_en.pdf .. _ESP32-C3-DevKitC-02 Schematic: https://dl.espressif.com/dl/schematics/SCH_ESP32-C3-DEVKITC-02_V1_1_20210126A.pdf diff --git a/docs/en/hw-reference/esp32s2/user-guide-devkitm-1-v1.rst b/docs/en/hw-reference/esp32s2/user-guide-devkitm-1-v1.rst deleted file mode 100644 index 5174afa98ee3..000000000000 --- a/docs/en/hw-reference/esp32s2/user-guide-devkitm-1-v1.rst +++ /dev/null @@ -1,321 +0,0 @@ -================== -ESP32-S2-DevKitM-1 -================== - -:link_to_translation:`zh_CN:[中文]` - -This user guide provides information on Espressif's small-sized development board ESP32-S2-DevKitM-1. - -ESP32-S2-DevKitM-1 is entry-level development board. Most of the I/O pins on the module are broken out to the pin headers on both sides for easy interfacing. Developers can either connect peripherals with jumper wires or mount ESP32-S2-DevKitM-1 on a breadboard. - -+----------------------+-----------------------+ -| |ESP32-S2-DevKitM-1| | |ESP32-S2-DevKitM-1U| | -+----------------------+-----------------------+ -| ESP32-S2-DevKitM-1 | ESP32-S2-DevKitM-1U | -+----------------------+-----------------------+ - -.. |ESP32-S2-DevKitM-1| image:: ../../../_static/esp32-s2-devkitm-1-v1-isometric.png - -.. |ESP32-S2-DevKitM-1U| image:: ../../../_static/esp32-s2-devkitm-1u-v1-isometric.png - -The document consists of the following major sections: - -- `Getting started`_: Provides an overview of the ESP32-S2-DevKitM-1 and hardware/software setup instructions to get started. -- `Hardware reference`_: Provides more detailed information about the ESP32-S2-DevKitM-1's hardware. -- `Hardware Revision Details`_: Revision history, known issues, and links to user guides for previous versions (if any) of ESP32-S2-DevKitM-1. -- `Related Documents`_: Gives links to related documentation. - - -Getting Started -=============== - -This section describes how to get started with ESP32-S2-DevKitM-1. It begins with a few introductory sections about the ESP32-S2-DevKitM-1, then Section `Start Application Development`_ provides instructions on how to get the ESP32-S2-DevKitM-1 ready and flash firmware into it. - - -Contents and Packaging ----------------------- - - -.. _user-guide-s2-devkitm-1-v1-ordering-info: - -Ordering Information -^^^^^^^^^^^^^^^^^^^^ - -The development board has a variety of variants to choose from, as shown in the table below. - -.. list-table:: - :header-rows: 1 - :widths: 41 24 9 8 18 - - * - Ordering Code - - On-board Module [#]_ - - Flash - - PSRAM - - Antenna - * - ESP32-S2-DevKitM-1-N4R2 - - ESP32-S2-MINI-2 - - (Recommended) - - 4 MB - - 2 MB - - PCB on-board antenna - * - ESP32-S2-DevKitM-1U-N4R2 - - ESP32-S2-MINI-2U - - (Recommended) - - 4 MB - - 2 MB - - External antenna connector - * - ESP32-S2-DevKitM-1 - - ESP32-S2-MINI-1 - - 4 MB - - --- - - PCB on-board antenna - * - ESP32-S2-DevKitM-1U - - ESP32-S2-MINI-1U - - 4 MB - - --- - - External antenna connector - * - ESP32-S2-DevKitM-1R - - ESP32-S2-MINI-1 - - 4 MB - - 2 MB - - PCB on-board antenna - * - ESP32-S2-DevKitM-1RU - - ESP32-S2-MINI-1U - - 4 MB - - 2 MB - - External antenna connector - - -.. [#] The ESP32-S2-MINI-2 and ESP32-S2-MINI-2U modules use chip revision v1.0, and the rest use chip revision v0.0. For more information about chip revisions, please refer to `ESP32-S2 Series SoC Errata`_. - - -Retail Orders -^^^^^^^^^^^^^ - -If you order a few samples, each ESP32-S2-DevKitM-1 comes in an individual package in either antistatic bag or any packaging depending on your retailer. - -For retail orders, please go to https://www.espressif.com/en/contact-us/get-samples. - - -Wholesale Orders -^^^^^^^^^^^^^^^^ - -If you order in bulk, the boards come in large cardboard boxes. - -For wholesale orders, please go to https://www.espressif.com/en/contact-us/sales-questions. - - -Description of Components -------------------------- - -.. _user-guide-devkitm-1-v1-board-front: - -.. figure:: ../../../_static/esp32-s2-devkitm-1-v1-annotated-photo.png - :align: center - :alt: ESP32-S2-DevKitM-1 - front - :figclass: align-center - - ESP32-S2-DevKitM-1 - front - -.. figure:: ../../../_static/esp32-s2-devkitm-1u-v1-annotated-photo.png - :align: center - :alt: ESP32-S2-DevKitM-1U - front - :figclass: align-center - - ESP32-S2-DevKitM-1U - front - -The key components of the board are described in a clockwise direction. - -.. list-table:: - :widths: 30 70 - :header-rows: 1 - - * - Key Component - - Description - * - On-board module (ESP32-S2-MINI-1 or ESP32-S2-MINI-1U in figures above) - - ESP32-S2-MINI series modules with an on-board PCB antenna or a connector for an external antenna. This series of modules, known for its small size, have a flash and/or a PSRAM integrated in the chip package. For more information, please refer to :ref:`user-guide-s2-devkitm-1-v1-ordering-info`. - * - Pin Headers - - All available GPIO pins (except for the SPI bus for flash) are broken out to the pin headers on the board. Users can program ESP32-S2FH4 chip to enable multiple functions such as SPI, I2S, UART, I2C, touch sensors, PWM etc. For details, please see :ref:`user-guide-devkitm-1-v1-header-blocks`. - * - 3.3 V Power On LED - - Turns on when the USB power is connected to the board. - * - USB to UART Bridge - - Single USB-UART bridge chip provides transfer rates up to 3 Mbps. - * - Reset Button - - Reset button. - * - Micro-USB Port - - USB interface. Power supply for the board as well as the communication interface between a computer and the ESP32-S2FH4 chip. - * - Boot Button - - Download button. Holding down **Boot** and then pressing **Reset** initiates Firmware Download mode for downloading firmware through the serial port. - * - RGB LED - - Addressable RGB LED, driven by GPIO18. - * - 5 V to 3.3 V LDO - - Power regulator that converts a 5 V supply into a 3.3 V output. - * - External Antenna Connector - - On **ESP32-S2-MINI-2U** and **ESP32-S2-MINI-1U** module only. For connector dimensions, please refer to Section External Antenna Connector Dimensions in module datasheet. - - -Start Application Development ------------------------------ - -Before powering up your ESP32-S2-DevKitM-1, please make sure that it is in good condition with no obvious signs of damage. - - -Required Hardware -^^^^^^^^^^^^^^^^^ - -- ESP32-S2-DevKitM-1 -- USB 2.0 cable (Standard-A to Micro-B) -- Computer running Windows, Linux, or macOS - -.. note:: - - Be sure to use an appropriate USB cable. Some cables are for charging only and do not provide the needed data lines nor work for programming the boards. - - -Software Setup -^^^^^^^^^^^^^^ - -Please proceed to :doc:`../../get-started/index`, where Section :ref:`get-started-step-by-step` will quickly help you set up the development environment and then flash an application example into your ESP32-S2-DevKitM-1. - -.. note:: - - ESP32-S2 series of chips only is only supported in ESP-IDF master or version v4.2 and higher. - - -Hardware Reference -================== - -Block Diagram -------------- - -A block diagram below shows the components of ESP32-S2-DevKitM-1 and their interconnections. - -.. figure:: ../../../_static/esp32-s2-devkitm-1-v1-block-diagram.png - :align: center - :scale: 70% - :alt: ESP32-S2-DevKitM-1 (click to enlarge) - :figclass: align-center - - ESP32-S2-DevKitM-1 (click to enlarge) - - -Power Supply Options -^^^^^^^^^^^^^^^^^^^^ - -There are three mutually exclusive ways to provide power to the board: - -- Micro-USB Port, default power supply -- 5V and GND pin headers -- 3V3 and GND pin headers - -It is recommended to use the first option: micro USB Port. - - -.. _user-guide-devkitm-1-v1-header-blocks: - -Header Block ------------- - -The two tables below provide the **Name** and **Function** of the pin headers on both sides of the board (J1 and J3). The pin header names are shown in :ref:`user-guide-devkitm-1-v1-board-front`. The numbering is the same as in the `ESP32-S2-DevKitM-1 Schematics `_ (PDF). - - -J1 -^^^ - -=== ==== ========== ============================================================= -No. Name Type [#]_ Function -=== ==== ========== ============================================================= -1 3V3 P 3.3 V power supply -2 0 I/O/T RTC_GPIO0, GPIO0 -3 1 I/O/T RTC_GPIO1, GPIO1, TOUCH1, ADC1_CH0 -4 2 I/O/T RTC_GPIO2, GPIO2, TOUCH2, ADC1_CH1 -5 3 I/O/T RTC_GPIO3, GPIO3, TOUCH3, ADC1_CH2 -6 4 I/O/T RTC_GPIO4, GPIO4, TOUCH4, ADC1_CH3 -7 5 I/O/T RTC_GPIO5, GPIO5, TOUCH5, ADC1_CH4 -8 6 I/O/T RTC_GPIO6, GPIO6, TOUCH6, ADC1_CH5 -9 7 I/O/T RTC_GPIO7, GPIO7, TOUCH7, ADC1_CH6 -10 8 I/O/T RTC_GPIO8, GPIO8, TOUCH8, ADC1_CH7 -11 9 I/O/T RTC_GPIO9, GPIO9, TOUCH9, ADC1_CH8, FSPIHD -12 10 I/O/T RTC_GPIO10, GPIO10, TOUCH10, ADC1_CH9, FSPICS0, FSPIIO4 -13 11 I/O/T RTC_GPIO11, GPIO11, TOUCH11, ADC2_CH0, FSPID, FSPIIO5 -14 12 I/O/T RTC_GPIO12, GPIO12, TOUCH12, ADC2_CH1, FSPICLK, FSPIIO6 -15 13 I/O/T RTC_GPIO13, GPIO13, TOUCH13, ADC2_CH2, FSPIQ, FSPIIO7 -16 14 I/O/T RTC_GPIO14, GPIO14, TOUCH14, ADC2_CH3, FSPIWP, FSPIDQS -17 15 I/O/T RTC_GPIO15, GPIO15, U0RTS, ADC2_CH4, XTAL_32K_P -18 16 I/O/T RTC_GPIO16, GPIO16, U0CTS, ADC2_CH5, XTAL_32K_N -19 17 I/O/T RTC_GPIO17, GPIO17, U1TXD, ADC2_CH6, DAC_1 -20 5V P 5 V power supply -21 G G Ground -=== ==== ========== ============================================================= - - -J3 -^^^ - -=== ==== ===== ======================================================== -No. Name Type Function -=== ==== ===== ======================================================== -1 G G Ground -2 RST I CHIP_PU -3 46 I GPIO46 -4 45 I/O/T GPIO45 -5 RX I/O/T U0RXD, GPIO44, CLK_OUT2 -6 TX I/O/T U0TXD, GPIO43, CLK_OUT1 -7 42 I/O/T MTMS, GPIO42 -8 41 I/O/T MTDI, GPIO41, CLK_OUT1 -9 40 I/O/T MTDO, GPIO40, CLK_OUT2 -10 39 I/O/T MTCK, GPIO39, CLK_OUT3 -11 38 I/O/T GPIO38, FSPIWP -12 37 I/O/T SPIDQS, GPIO37, FSPIQ -13 36 I/O/T SPIIO7, GPIO36, FSPICLK -14 35 I/O/T SPIIO6, GPIO35, FSPID -15 34 I/O/T SPIIO5, GPIO34, FSPICS0 -16 33 I/O/T SPIIO4, GPIO33, FSPIHD -17 26 I/O/T SPICS1, GPIO26 -18 21 I/O/T RTC_GPIO21, GPIO21 -19 20 I/O/T RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1, USB_D+ -20 19 I/O/T RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8, CLK_OUT2, USB_D- -21 18 I/O/T RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7, DAC_2, CLK_OUT3, RGB LED -=== ==== ===== ======================================================== - -.. [#] P: Power supply; I: Input; O: Output; T: High impedance. - - -Pin Layout -^^^^^^^^^^^ - -.. figure:: ../../../_static/esp32-s2-devkitm-1-v1-pin-layout.png - :align: center - :scale: 15% - :alt: ESP32-S2-DevKitM-1 (click to enlarge) - :figclass: align-center - - ESP32-S2-DevKitM-1 Pin Layout (click to enlarge) - - -Hardware Revision Details -========================= - -This is the first revision of this board released. - - -Related Documents -================= - -* `ESP32-S2 Series Chip Revision v1.0 Datasheet`_ (PDF) -* `ESP32-S2 Series Chip Revision v0.0 Datasheet `_ (PDF) -* `ESP32-S2 Series SoC Errata`_ (PDF) -* `ESP32-S2-MINI-2 & ESP32-S2-MINI-2U Module Datasheet `_ (PDF) -* `ESP32-S2-MINI-1 & ESP32-S2-MINI-1U Module Datasheet `_ (PDF) -* `ESP32-S2-DevKitM-1 Schematics `_ (PDF) -* `ESP32-S2-DevKitM-1 PCB Layout `_ (PDF) -* `ESP32-S2-DevKitM-1 Dimensions `_ (PDF) -* `ESP Product Selector `_ - -For other design documentation for the board, please contact us at `sales@espressif.com `_. - -.. _NRND: https://www.espressif.com/en/products/longevity-commitment?id=nrnd -.. _ESP32-S2 Series Chip Revision v1.0 Datasheet: https://www.espressif.com/sites/default/files/documentation/esp32-s2-v1.0_datasheet_en.pdf -.. _ESP32-S2 Series SoC Errata: https://espressif.com/sites/default/files/documentation/esp32-s2_errata_en.pdf diff --git a/docs/en/migration-guides/release-5.x/5.0/networking.rst b/docs/en/migration-guides/release-5.x/5.0/networking.rst index 08cb46d778ca..736c3631631c 100644 --- a/docs/en/migration-guides/release-5.x/5.0/networking.rst +++ b/docs/en/migration-guides/release-5.x/5.0/networking.rst @@ -131,6 +131,8 @@ All the ``tcpip_adapter`` functions have their ``esp-netif`` counter-part. Pleas * :component_file:`DNS ` * :component_file:`IP address ` +The TCP/IP Adapter API ``tcpip_adapter_get_sta_list()`` that was used to acquire a list of associated Wi-Fi stations to the Software Access Point (softAP) has been moved to the Wi-Fi component and renamed to :cpp:func:`esp_wifi_ap_get_sta_list_with_ip()`, which is a special case of the ESP-NETIF API :cpp:func:`esp_netif_dhcps_get_clients_by_mac()` that could be used more generally to provide a list of clients connected to a DHCP server no matter which network interface the server is running on. + Default Event Handlers ^^^^^^^^^^^^^^^^^^^^^^ diff --git a/docs/zh_CN/api-guides/tools/idf-py.rst b/docs/zh_CN/api-guides/tools/idf-py.rst index 6e21802bea04..30750affcfc3 100644 --- a/docs/zh_CN/api-guides/tools/idf-py.rst +++ b/docs/zh_CN/api-guides/tools/idf-py.rst @@ -1,5 +1,5 @@ IDF 前端工具 - ``idf.py`` -************************************** +********************************** :link_to_translation:`en:[English]` @@ -83,7 +83,7 @@ ESP-IDF 支持多个目标芯片，运行 ``idf.py --list-targets`` 查看当前 此命令将构建当前目录下的工程，具体步骤如下： - - 若有需要，创建构建子目录 ``build`` 保存构建输出文件，使用 ``-B`` 选项可改变子目录的路径。 + - 若有需要，创建构建子目录 "build" 保存构建输出文件，使用 ``-B`` 选项可改变子目录的路径。 - 必要时运行 CMake_ 配置工程，并为主要构建工具生成构建文件。 - 运行主要构建工具（Ninja_ 或 ``GNU Make``）。默认情况下，构建工具会完成自动检测，也可通过将 ``-G`` 选项传递给 ``idf.py`` 来显式设置构建工具。 @@ -107,7 +107,7 @@ ESP-IDF 支持多个目标芯片，运行 ``idf.py --list-targets`` 查看当前 idf.py fullclean -此命令将删除所有 ``build`` 子目录内容，包括 CMake 配置输出。下次构建时，CMake 将重新配置其输出。注意，此命令将递归删除构建目录下的 *所有* 文件（工程配置将保留），请谨慎使用。 +此命令将删除所有 "build" 子目录内容，包括 CMake 配置输出。下次构建时，CMake 将重新配置其输出。注意，此命令将递归删除构建目录下的 *所有* 文件（工程配置将保留），请谨慎使用。 烧录工程：``flash`` ------------------------ @@ -120,6 +120,8 @@ ESP-IDF 支持多个目标芯片，运行 ``idf.py --list-targets`` 查看当前 .. note:: 环境变量 ``ESPPORT`` 和 ``ESPBAUD`` 可分别设置 ``-p`` 和 ``-b`` 选项的默认值，在命令行上设置这些选项的参数可覆盖默认值。 +``idf.py`` 在内部使用 ``esptool.py`` 的 ``write_flash`` 命令来烧录目标设备。通过 ``--extra-args`` 选项传递额外的参数，并配置烧录过程。例如，要 `写入到外部 SPI flash 芯片 `_，请使用以下命令： ``idf.py flash --extra-args="--spi-connection ,,,,"``。要查看所有可用参数，请运行 ``esptool.py write_flash --help`` 或查看 `esptool.py 文档 `_。 + 与 ``build`` 命令类似，使用 ``app``、``bootloader`` 或 ``partition-table`` 参数运行此命令，可选择仅烧录应用程序、引导加载程序或分区表。 错误处理提示 @@ -210,7 +212,7 @@ ESP-IDF 支持多个目标芯片，运行 ``idf.py --list-targets`` 查看当前 idf.py uf2 -此命令将在构建目录中生成一个 UF2（`USB 烧录格式 `_) 二进制文件 ``uf2.bin``，该文件包含所有烧录目标芯片所必需的二进制文件，即引导加载程序、应用程序和分区表。 +此命令将在构建目录中生成一个 UF2（`USB 烧录格式 `_）二进制文件 ``uf2.bin``，该文件包含所有烧录目标芯片所必需的二进制文件，即引导加载程序、应用程序和分区表。 在 ESP 芯片上运行 `ESP USB Bridge `_ 项目将创建一个 USB 大容量存储设备，用户可以将生成的 UF2 文件复制到该 USB 设备中，桥接 MCU 将使用该文件来烧录目标 MCU。这一操作十分简单，只需将文件复制（或“拖放”）到文件资源管理器访问的公开磁盘中即可。 @@ -226,7 +228,7 @@ ESP-IDF 支持多个目标芯片，运行 ``idf.py --list-targets`` 查看当前 运行 ``idf.py --help`` 列出所有可用的根级别选项。要列出特定子命令的选项，请运行 ``idf.py --help``，如 ``idf.py monitor --help``。部分常用选项如下： - ``-C `` 支持从默认的当前工作目录覆盖工程目录。 -- ``-B `` 支持从工程目录的默认 ``build`` 子目录覆盖构建目录。 +- ``-B `` 支持从工程目录的默认 "build" 子目录覆盖构建目录。 - ``--ccache`` 可以在安装了 CCache_ 工具的前提下，在构建源文件时启用 CCache_，减少部分构建耗时。 .. important:: diff --git a/docs/zh_CN/api-reference/network/esp_netif.rst b/docs/zh_CN/api-reference/network/esp_netif.rst index 3eb9bfe3e879..0b6a9a34fd0e 100644 --- a/docs/zh_CN/api-reference/network/esp_netif.rst +++ b/docs/zh_CN/api-reference/network/esp_netif.rst @@ -264,7 +264,7 @@ SNTP 的简要介绍、初始化代码和基本模式请参阅 :doc:`系统时 本节介绍了使用 SNTP 服务特定用例的详细信息，包括静态配置的服务器、使用 DHCP 提供的服务器或两者兼备的情况，操作流程如下： -1) 调用 :cpp:func:`esp_netif_sntp_init()` 初始化服务并完成配置。 +1) 调用 :cpp:func:`esp_netif_sntp_init()` 初始化服务并完成配置。此操作只能执行一次（除非已调用 :cpp:func:`esp_netif_sntp_deinit()` 销毁 SNTP 服务）。 2) 调用 :cpp:func:`esp_netif_sntp_start()` 启动服务。如果在前一步中已经默认启动了服务，则不需要此步骤。如果需使用通过 DHCP 获取的 NTP 服务器，推荐在完成连接后显式启动该服务。注意，应在连接前启用通过 DHCP 获取的 NTP 服务器选项，并在连接后再启用 SNTP 服务。 3) 需要时，可调用 :cpp:func:`esp_netif_sntp_sync_wait()` 等待系统时间同步。 4) 调用 :cpp:func:`esp_netif_sntp_deinit()` 停止并销毁服务。 diff --git a/docs/zh_CN/api-reference/storage/spiffs.rst b/docs/zh_CN/api-reference/storage/spiffs.rst index eabed087cb9b..4ce85b7ed335 100644 --- a/docs/zh_CN/api-reference/storage/spiffs.rst +++ b/docs/zh_CN/api-reference/storage/spiffs.rst @@ -85,6 +85,10 @@ SPIFFS 是一个用于 SPI NOR flash 设备的嵌入式文件系统，支持磨 python esptool.py --chip {IDF_TARGET_PATH_NAME} --port [port] --baud [baud] write_flash -z 0x110000 spiffs.bin +.. note:: + + 通过 ``--spi-connection ,,,,`` 选项，可以配置 ``esptool.py`` 的 ``write_flash`` 命令，从而 `将 spiffs 数据写入外部 SPI flash 芯片 `_。只需指定分配给外部 flash 的 GPIO 管脚，如 ``python esptool.py write_flash --spi-connection 6,7,8,9,11 -z 0x110000 spiffs.bin``。 + 选择合适的 SPIFFS 工具 ~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ diff --git a/docs/zh_CN/api-reference/system/sleep_modes.rst b/docs/zh_CN/api-reference/system/sleep_modes.rst index 2e072b5bdf26..7d1b1bbc82ab 100644 --- a/docs/zh_CN/api-reference/system/sleep_modes.rst +++ b/docs/zh_CN/api-reference/system/sleep_modes.rst @@ -304,6 +304,20 @@ RTC 控制器中内嵌定时器，可用于在预定义的时间到达后唤醒 esp_sleep_pd_config(ESP_PD_DOMAIN_VDDSDIO, ESP_PD_OPTION_ON); + .. only:: SOC_PM_SUPPORT_TOP_PD + + .. note:: + + .. only:: SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP + + 在 Light-sleep 模式下，如果设置 Kconfig 选项 :ref:`CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP`，为了继续使用 :cpp:func:`gpio_wakeup_enable` 用于 GPIO 唤醒， 需要先调用 :cpp:func:`rtc_gpio_init` 和 :cpp:func:`rtc_gpio_set_direction`，用于设置 RTC IO 为输入模式。 + + 或者， 可以使用直接调用 :cpp:func:`esp_deep_sleep_enable_gpio_wakeup` 用于 GPIO 唤醒，因为此时 digital IO 的电源域已经被关闭，这个情况类似于进入 Deep-sleep。 + + .. only:: not SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP + + 在 Light-sleep 模式下，如果设置 Kconfig 选项 :ref:`CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP`，为了继续使用 :cpp:func:`gpio_wakeup_enable` 用于 GPIO 唤醒， 需要先调用 :cpp:func:`rtc_gpio_init` 和 :cpp:func:`rtc_gpio_set_direction`，用于设置 RTC IO 为输入模式。 + .. only:: not SOC_RTCIO_WAKE_SUPPORTED GPIO 唤醒 @@ -313,11 +327,13 @@ RTC 控制器中内嵌定时器，可用于在预定义的时间到达后唤醒 此外，可将由 VDD3P3_RTC 电源域供电的 IO 用于芯片的 Deep-sleep 唤醒。调用 :cpp:func:`esp_deep_sleep_enable_gpio_wakeup` 函数可以配置相应的唤醒管脚和唤醒触发电平，该函数用于启用相应管脚的 Deep-sleep 唤醒功能。 - .. only:: esp32c6 or esp32h2 + .. only:: SOC_PM_SUPPORT_TOP_PD .. note:: - 在 Light-sleep 模式下，设置 Kconfig 选项 :ref:`CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP` 将使 GPIO 唤醒失效。 + .. only:: SOC_GPIO_SUPPORT_DEEPSLEEP_WAKEUP + + 在 Light-sleep 模式下，如果设置 Kconfig 选项 :ref:`CONFIG_PM_POWER_DOWN_PERIPHERAL_IN_LIGHT_SLEEP`，可以使用直接调用 :cpp:func:`esp_deep_sleep_enable_gpio_wakeup` 用于 GPIO 唤醒，因为此时 digital IO 的电源域已经被关闭，这个情况类似于进入 Deep-sleep。 UART 唤醒（仅适用于 Light-sleep 模式） ^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^ diff --git a/docs/zh_CN/get-started/index.rst b/docs/zh_CN/get-started/index.rst index 1d5a54b0d6d4..51287f88b829 100644 --- a/docs/zh_CN/get-started/index.rst +++ b/docs/zh_CN/get-started/index.rst @@ -114,7 +114,7 @@ :maxdepth: 1 ESP32-S2-Saola-1 <../hw-reference/esp32s2/user-guide-saola-1-v1.2> - ESP32-S2-DevKitM-1 <../hw-reference/esp32s2/user-guide-devkitm-1-v1> + ESP32-S2-DevKitM-1 ESP32-S2-DevKitC-1 <../hw-reference/esp32s2/user-guide-s2-devkitc-1> ESP32-S2-Kaluga-Kit <../hw-reference/esp32s2/user-guide-esp32-s2-kaluga-1-kit> diff --git a/docs/zh_CN/hw-reference/esp32c3/user-guide-devkitc-02.rst b/docs/zh_CN/hw-reference/esp32c3/user-guide-devkitc-02.rst index e23aa28b1c29..c3388cb74b81 100644 --- a/docs/zh_CN/hw-reference/esp32c3/user-guide-devkitc-02.rst +++ b/docs/zh_CN/hw-reference/esp32c3/user-guide-devkitc-02.rst @@ -192,23 +192,21 @@ J3 9 RX I/O/T GPIO20, U0RXD 10 TX I/O/T GPIO21, U0TXD 11 G G 接地 -12 18 I/O/T GPIO18 -13 19 I/O/T GPIO19 +12 18 I/O/T GPIO18, USB_D- +13 19 I/O/T GPIO19, USB_D+ 14 G G 接地 15 G G 接地 ==== ==== ========== ================================ - .. [1] P：电源；I：输入；O：输出；T：可设置为高阻。 .. [2] GPIO2、GPIO8、GPIO9 为 ESP32-C3 芯片的 Strapping 管脚。在芯片上电和系统复位过程中，Strapping 管脚根据管脚的二进制电压值控制芯片功能。Strapping 管脚的具体描述和应用，请参考 `ESP32-C3 技术规格书`_ 的 Strapping 管脚章节。 - 管脚布局 ^^^^^^^^ .. figure:: ../../../_static/esp32-c3-devkitc-02-v1-pinout.png :align: center - :scale: 50% + :scale: 45% :alt: ESP32-C3-DevKitC-02 管脚布局（点击放大） :figclass: align-center diff --git a/docs/zh_CN/hw-reference/esp32c3/user-guide-devkitm-1.rst b/docs/zh_CN/hw-reference/esp32c3/user-guide-devkitm-1.rst index bf521bbf019c..76f4c71f152d 100644 --- a/docs/zh_CN/hw-reference/esp32c3/user-guide-devkitm-1.rst +++ b/docs/zh_CN/hw-reference/esp32c3/user-guide-devkitm-1.rst @@ -193,8 +193,8 @@ J3 10 IO5 I/O/T GPIO5, ADC2_CH0, FSPIWP, MTDI 11 IO4 I/O/T GPIO4, ADC1_CH4, FSPIHD, MTMS 12 GND G 接地 -13 IO18 I/O/T GPIO18 -14 IO19 I/O/T GPIO19 +13 IO18 I/O/T GPIO18, USB_D- +14 IO19 I/O/T GPIO19, USB_D+ 15 GND G 接地 ==== ==== ========== ================================ diff --git a/docs/zh_CN/hw-reference/esp32s2/user-guide-devkitm-1-v1.rst b/docs/zh_CN/hw-reference/esp32s2/user-guide-devkitm-1-v1.rst deleted file mode 100644 index 03e03e38de76..000000000000 --- a/docs/zh_CN/hw-reference/esp32s2/user-guide-devkitm-1-v1.rst +++ /dev/null @@ -1,321 +0,0 @@ -================== -ESP32-S2-DevKitM-1 -================== - -:link_to_translation:`en: [English]` - -本指南介绍了乐鑫的小型开发板 ESP32-S2-DevKitM-1。 - -ESP32-S2-DevKitM-1 是乐鑫一款入门级开发板。板上模组大部分管脚均已引出至两侧排针，开发人员可根据实际需求，轻松通过跳线连接多种外围设备，同时也可将开发板插在面包板上使用。 - -+----------------------+-----------------------+ -| |ESP32-S2-DevKitM-1| | |ESP32-S2-DevKitM-1U| | -+----------------------+-----------------------+ -| ESP32-S2-DevKitM-1 | ESP32-S2-DevKitM-1U | -+----------------------+-----------------------+ - -.. |ESP32-S2-DevKitM-1| image:: ../../../_static/esp32-s2-devkitm-1-v1-isometric.png - -.. |ESP32-S2-DevKitM-1U| image:: ../../../_static/esp32-s2-devkitm-1u-v1-isometric.png - -本指南包括如下内容： - -- `入门指南`_: 简要介绍了 ESP32-S2-DevKitM-1 和硬件、软件设置指南。 -- `硬件参考`_: 详细介绍了 ESP32-S2-DevKitM-1 的硬件。 -- `硬件版本`_：介绍硬件历史版本和已知问题，并提供链接至历史版本开发板的入门指南（如有）。 -- `相关文档`_: 列出了相关文档的链接。 - - -入门指南 -======== - -本节介绍了如何快速上手 ESP32-S2-DevKitM-1。开头部分介绍了 ESP32-S2-DevKitM-1，`开始开发应用`_ 小节介绍了怎样在 ESP32-S2-DevKitM-1 上烧录固件及相关准备工作。 - - -内含组件和包装 --------------- - - -.. _user-guide-devkitm-1-v1-ordering-info: - -订购信息 -^^^^^^^^ - -该开发板有多种型号可供选择，详见下表。 - -.. list-table:: - :header-rows: 1 - :widths: 30 30 10 10 20 - - * - 订购代码 - - 搭载模组 [#]_ - - Flash - - PSRAM - - 天线 - * - ESP32-S2-DevKitM-1-N4R2 - - ESP32-S2-MINI-1-2 - - （推荐） - - 4 MB - - 2 MB - - PCB 板载天线 - * - ESP32-S2-DevKitM-1U-N4R2 - - ESP32-S2-MINI-1-2U - - （推荐） - - 4 MB - - 2 MB - - 外部天线连接器 - * - ESP32-S2-DevKitM-1 - - ESP32-S2-MINI-1 - - 4 MB - - --- - - PCB 板载天线 - * - ESP32-S2-DevKitM-1U - - ESP32-S2-MINI-1U - - 4 MB - - --- - - 外部天线连接器 - * - ESP32-S2-DevKitM-1R - - ESP32-S2-MINI-1 - - 4 MB - - 2 MB - - PCB 板载天线 - * - ESP32-S2-DevKitM-1RU - - ESP32-S2-MINI-1U - - 4 MB - - 2 MB - - 外部天线连接器 - - -.. [#] ESP32-S2-MINI-2 和 ESP32-S2-MINI-2U 模组使用 v1.0 版本芯片，其余模组使用 v0.0 版本芯片。更多关于芯片版本的信息，请参考 `《ESP32-S2 系列芯片勘误表》`_。 - - -零售订单 -^^^^^^^^ - -如购买样品，每个 ESP32-S2-DevKitM-1 开发板将以防静电袋或零售商选择的其他方式包装。 - -零售订单请前往 https://www.espressif.com/zh-hans/company/contact/buy-a-sample。 - - -批量订单 -^^^^^^^^ - -如批量购买，ESP32-S2-DevKitM-1 开发板将以大纸板箱包装。 - -批量订单请前往 https://www.espressif.com/zh-hans/contact-us/sales-questions。 - - -组件介绍 --------- - -.. _user-guide-devkitm-1-v1-board-front: - -.. figure:: ../../../_static/esp32-s2-devkitm-1-v1-annotated-photo.png - :align: center - :alt: ESP32-S2-DevKitM-1 - 正面 - :figclass: align-center - - ESP32-S2-DevKitM-1 - 正面 - -.. figure:: ../../../_static/esp32-s2-devkitm-1u-v1-annotated-photo.png - :align: center - :alt: ESP32-S2-DevKitM-1U - 正面 - :figclass: align-center - - ESP32-S2-DevKitM-1U - 正面 - -以下按照顺时针的顺序依次介绍开发板上的主要组件。 - -.. list-table:: - :widths: 30 70 - :header-rows: 1 - - * - 主要组件 - - 介绍 - * - 板载模组（上图中为 ESP32-S2-MINI-1 或 ESP32-S2-MINI-1U） - - ESP32-S2-MINI 系列模组，可搭载 PCB 板载天线或外部天线连接器。该系列模组尺寸小，flash 和/或 PSRAM 集成在芯片封装内。更多信息，详见 :ref:`user-guide-devkitm-1-v1-ordering-info`。 - * - Pin Headers（排针） - - 所有可用 GPIO 管脚（除 flash 的 SPI 总线）均已引出至开发板的排针。用户可对 ESP32-S2FH4 芯片编程，使能 SPI、I2S、UART、I2C、触摸传感器、PWM 等多种功能。请查看 :ref:`user-guide-devkitm-1-v1-header-blocks` 获取更多信息。 - * - 3.3 V Power On LED（3.3 V 电源指示灯） - - 开发板连接 USB 电源后，该指示灯亮起。 - * - USB-to-UART Bridge（USB 转 UART 桥接器） - - 单芯片 USB 至 UART 桥接器，可提供高达 3 Mbps 的传输速率。 - * - Reset Button（Reset 键） - - 复位按键。 - * - Micro-USB（Micro-USB 接口） - - USB 接口。可用作开发板的供电电源或 PC 和 ESP32-S2FH4 芯片的通信接口。 - * - Boot Button（Boot 键） - - 下载按键。按住 **Boot** 键的同时按一下 **Reset** 键进入“固件下载”模式，通过串口下载固件。 - * - RGB LED - - 可寻址 RGB 发光二极管，由 GPIO18 驱动。 - * - 5 V to 3.3 V LDO（5 V 转 3.3 V LDO） - - 电源转换器，输入 5 V，输出 3.3 V。 - * - External Antenna Connector（外部天线连接器） - - 仅 **ESP32-S2-MINI-2U** 和 **ESP32-S2-MINI-1U** 模组带有外部天线连接器。连接器尺寸，请参考模组规格书的 外部天线连接器尺寸章节。 - - -开始开发应用 ------------- - -通电前，请确保 ESP32-S2-DevKitM-1 完好无损。 - - -必备硬件 -^^^^^^^^ - -- ESP32-S2-DevKitM-1 -- USB 2.0 数据线（标准 A 型转 Micro-B 型） -- 电脑（Windows、Linux 或 macOS） - -.. 注解:: - - 请确保使用适当的 USB 数据线。部分数据线仅可用于充电，无法用于数据传输和编程。 - - -软件设置 -^^^^^^^^ - -请前往 :doc:`../../get-started/index`，在 :ref:`get-started-step-by-step` 一节查看如何快速设置开发环境，将应用程序烧录至 ESP32-S2-DevKitM-1。 - -.. 注解:: - - ESP32-S2 系列芯片仅支持 ESP-IDF master 分支或 v4.2 以上版本。 - - -硬件参考 -======== - -功能框图 --------- - -ESP32-S2-DevKitM-1 的主要组件和连接方式如下图所示。 - -.. figure:: ../../../_static/esp32-s2-devkitm-1-v1-block-diagram.png - :align: center - :scale: 70% - :alt: ESP32-S2-DevKitM-1 （点击放大） - :figclass: align-center - - ESP32-S2-DevKitM-1 （点击放大） - - -电源选项 -^^^^^^^^ - -以下任一供电方式均可给 ESP32-S2-DevKitM-1 供电： - -- Micro-USB 接口供电（默认） -- 5V 和 GND 排针供电 -- 3V3 和 GND 排针供电 - -建议选择第一种供电方式：micro USB 接口供电。 - - -.. _user-guide-devkitm-1-v1-header-blocks: - -排针 ----- - -下表列出了开发板两侧排针（J1 和 J3）的 **名称** 和 **功能**，排针的名称如图 :ref:`user-guide-devkitm-1-v1-board-front` 所示，排针的序号与 `ESP32-S2-DevKitM-1 原理图 `_ (PDF) 一致。 - - -J1 -^^^ - -==== ==== ========= ========================================================================= -序号 名称 类型 [#]_ 功能 -==== ==== ========= ========================================================================= -1 3V3 P 3.3 V 电源 -2 0 I/O/T RTC_GPIO0, GPIO0 -3 1 I/O/T RTC_GPIO1, GPIO1, TOUCH1, ADC1_CH0 -4 2 I/O/T RTC_GPIO2, GPIO2, TOUCH2, ADC1_CH1 -5 3 I/O/T RTC_GPIO3, GPIO3, TOUCH3, ADC1_CH2 -6 4 I/O/T RTC_GPIO4, GPIO4, TOUCH4, ADC1_CH3 -7 5 I/O/T RTC_GPIO5, GPIO5, TOUCH5, ADC1_CH4 -8 6 I/O/T RTC_GPIO6, GPIO6, TOUCH6, ADC1_CH5 -9 7 I/O/T RTC_GPIO7, GPIO7, TOUCH7, ADC1_CH6 -10 8 I/O/T RTC_GPIO8, GPIO8, TOUCH8, ADC1_CH7 -11 9 I/O/T RTC_GPIO9, GPIO9, TOUCH9, ADC1_CH8, FSPIHD -12 10 I/O/T RTC_GPIO10, GPIO10, TOUCH10, ADC1_CH9, FSPICS0, FSPIIO4 -13 11 I/O/T RTC_GPIO11, GPIO11, TOUCH11, ADC2_CH0, FSPID, FSPIIO5 -14 12 I/O/T RTC_GPIO12, GPIO12, TOUCH12, ADC2_CH1, FSPICLK, FSPIIO6 -15 13 I/O/T RTC_GPIO13, GPIO13, TOUCH13, ADC2_CH2, FSPIQ, FSPIIO7 -16 14 I/O/T RTC_GPIO14, GPIO14, TOUCH14, ADC2_CH3, FSPIWP, FSPIDQS -17 15 I/O/T RTC_GPIO15, GPIO15, U0RTS, ADC2_CH4, XTAL_32K_P -18 16 I/O/T RTC_GPIO16, GPIO16, U0CTS, ADC2_CH5, XTAL_32K_N -19 17 I/O/T RTC_GPIO17, GPIO17, U1TXD, ADC2_CH6, DAC_1 -20 5V P 5 V 电源 -21 G G 接地 -==== ==== ========= ========================================================================= - - -J3 -^^^ - -==== ==== ===== ======================================================== -序号 名称 类型 功能 -==== ==== ===== ======================================================== -1 G G 接地 -2 RST I CHIP_PU -3 46 I GPIO46 -4 45 I/O/T GPIO45 -5 RX I/O/T U0RXD, GPIO44, CLK_OUT2 -6 TX I/O/T U0TXD, GPIO43, CLK_OUT1 -7 42 I/O/T MTMS, GPIO42 -8 41 I/O/T MTDI, GPIO41, CLK_OUT1 -9 40 I/O/T MTDO, GPIO40, CLK_OUT2 -10 39 I/O/T MTCK, GPIO39, CLK_OUT3 -11 38 I/O/T GPIO38, FSPIWP -12 37 I/O/T SPIDQS, GPIO37, FSPIQ -13 36 I/O/T SPIIO7, GPIO36, FSPICLK -14 35 I/O/T SPIIO6, GPIO35, FSPID -15 34 I/O/T SPIIO5, GPIO34, FSPICS0 -16 33 I/O/T SPIIO4, GPIO33, FSPIHD -17 26 I/O/T SPICS1, GPIO26 -18 21 I/O/T RTC_GPIO21, GPIO21 -19 20 I/O/T RTC_GPIO20, GPIO20, U1CTS, ADC2_CH9, CLK_OUT1, USB_D+ -20 19 I/O/T RTC_GPIO19, GPIO19, U1RTS, ADC2_CH8, CLK_OUT2, USB_D- -21 18 I/O/T RTC_GPIO18, GPIO18, U1RXD, ADC2_CH7, DAC_2, CLK_OUT3, RGB LED -==== ==== ===== ======================================================== - -.. [#] P：电源；I：输入；O：输出；T：可设置为高阻。 - - -管脚布局 -^^^^^^^^ - -.. figure:: ../../../_static/esp32-s2-devkitm-1-v1-pin-layout.png - :align: center - :scale: 15% - :alt: ESP32-S2-DevKitM-1 管脚布局（点击放大） - :figclass: align-center - - ESP32-S2-DevKitM-1 管脚布局（点击放大） - - -硬件版本 -========== - -无历史版本。 - - -相关文档 -======== - -* `ESP32-S2 系列芯片 v1.0 版本技术规格书`_ (PDF) -* `ESP32-S2 系列芯片 v0.0 版本技术规格书 `_ (PDF) -* `《ESP32-S2 系列芯片勘误表》`_ (PDF) -* `《ESP32-S2-MINI-2 & ESP32-S2-MINI-2U 技术规格书》 `_ (PDF) -* `《ESP32-S2-MINI-1 & ESP32-S2-MINI-1U 技术规格书》 `_ (PDF) -* `ESP32-S2-DevKitM-1 原理图 `_ (PDF) -* `ESP32-S2-DevKitM-1 PCB 布局 `_ (PDF) -* `ESP32-S2-DevKitM-1 尺寸图 `_ (PDF) -* `乐鑫产品选型工具 `__ - -有关本开发板的更多设计文档，请联系我们的商务部门 `sales@espressif.com `_。 - -.. _不推荐用于新设计: https://www.espressif.com/zh-hans/products/longevity-commitment -.. _ESP32-S2 系列芯片 v1.0 版本技术规格书: https://www.espressif.com/sites/default/files/documentation/esp32-s2-v1.0_datasheet_cn.pdf -.. _《ESP32-S2 系列芯片勘误表》: https://espressif.com/sites/default/files/documentation/esp32-s2_errata_cn.pdf diff --git a/docs/zh_CN/migration-guides/release-5.x/5.0/networking.rst b/docs/zh_CN/migration-guides/release-5.x/5.0/networking.rst index 412abc3dc26e..ea08a46431d4 100644 --- a/docs/zh_CN/migration-guides/release-5.x/5.0/networking.rst +++ b/docs/zh_CN/migration-guides/release-5.x/5.0/networking.rst @@ -131,6 +131,8 @@ TCP/IP 适配器是在 ESP-IDF v4.1 之前使用的网络接口抽象组件。 * :component_file:`DNS ` * :component_file:`IP address ` +TCP/IP 适配器 API ``tcpip_adapter_get_sta_list()`` 用于获取与软件接入点 (softAP) 相关联的 Wi-Fi 站点列表，现已移到 Wi-Fi 组件，并更名为 :cpp:func:`esp_wifi_ap_get_sta_list_with_ip()`，它是 ESP-NETIF API :cpp:func:`esp_netif_dhcps_get_clients_by_mac()` 一个特例。无论服务器在哪个网络接口上运行，该 API 都可更方便地提供连接到 DHCP 服务器的客户端列表。 + 默认事件处理程序 ^^^^^^^^^^^^^^^^^^^^^^ diff --git a/examples/storage/littlefs/main/idf_component.yml b/examples/storage/littlefs/main/idf_component.yml index 427e1c36bdeb..0056553732a3 100644 --- a/examples/storage/littlefs/main/idf_component.yml +++ b/examples/storage/littlefs/main/idf_component.yml @@ -1,3 +1,3 @@ ## IDF Component Manager Manifest File dependencies: - joltwallet/littlefs: "~=1.14.2" + joltwallet/littlefs: "~=1.14.4"