Handle register access rules

[crawfxrd]

Each bit of a register are one of the following:

• R (read-only)
  • Can be read. Writing has no effect.
• W (write-only)
  • Reading return 0. Writing sets the value.
• R/W (read-write)
  • Can be read. Writing sets the value.
• RC (read-clear)
  • Reading clears the bit. Writing has no effect.
• R/WC (read/write-clear)
  • Can be read. Writing 1 clears the bit. Writing 0 has no effect.

ecsim assumes all bits of a register are R/W, as it writes the new value to the register.

ecsim/src/xram.rs

Lines 640 to 643 in 6ba94d8

	if let Some(new) = new_opt {
	debug!(" store 0x{:02X}", new);
	mcu.store(Addr::XRam(address), new);
	}