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Hello. Assuming this is 3v3 by default. I'm currently working on a ryzen pc, and have to flash fairly
often. ryzen's use a 1v8 flash chip (as often as I've seen, at least), and I'm currently using a ch341a
with one of those 1v8 stepdown addons. Would I be able to use this with the addon for my use
case?
Also, how fast can this write, generally speaking? the ch341a is ok if its just an iteration of an existing
coreboot build, but if I'm going back to stock or from stock to coreboot it takes quite a while.
The text was updated successfully, but these errors were encountered:
Using it right now with a run of the mill aliexpress level shifter for SPI flashes (the addon you mention @hanetzer): works just fine
It reads a 16MB flash (MX25U12873F) in 33'', writes coreboot on top of stock bios in 2' 50''.
--Edit--
I have just finished modifying a Pico to let it run at 1v8 natively and this also works
Desoldered the rp2040 chip to cut traces and connect as per rp2040 datasheet § 2.9.7.3, changed the flash to a GD25LQ16EEIGR (any uson8 25-series nor flash will do, I assume) and supplied the gpio rail with an external 1v8.
Hello. Assuming this is 3v3 by default. I'm currently working on a ryzen pc, and have to flash fairly
often. ryzen's use a 1v8 flash chip (as often as I've seen, at least), and I'm currently using a ch341a
with one of those 1v8 stepdown addons. Would I be able to use this with the addon for my use
case?
Also, how fast can this write, generally speaking? the ch341a is ok if its just an iteration of an existing
coreboot build, but if I'm going back to stock or from stock to coreboot it takes quite a while.
The text was updated successfully, but these errors were encountered: